Optical Disc Error Correction With Variable Repetition Control
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Solution Overview
Problem
Conventional optical disc players face inefficiencies in data correction, as they perform a fixed number of error corrections regardless of error presence, leading to reduced system throughput and difficulty in handling random errors and increased data bits due to erasure flags.
Innovation Solution
A method and apparatus that dynamically vary the number of error correction repetitions based on error presence, using EFM demodulation, error detection codes, and PI/PO error correction, and generate erasure locations for efficient error correction without increasing system frequency or data bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed repetitive error correction is performed a predetermined number of times, then error correction capability is improved, but system throughput is reduced and memory bandwidth is consumed
Solution Approach 1:
The patent implements dynamic error correction by varying the number of correction repetitions based on actual error conditions. The system performs error correction 0-3 times depending on whether errors are detected and their severity, rather than using a fixed repetition count. This dynamic approach resolves the contradiction by adapting the correction intensity to match the actual data quality, maintaining high reliability when needed while preserving throughput when data is clean.
Solution Approach 2:
The system changes the parameter of correction repetition count based on error detection results. When EDC indicates no errors, zero corrections are performed; when errors are detected, the system adjusts the number of PI/PO correction iterations accordingly. This parameter adaptation allows the system to optimize between reliability and throughput by matching correction intensity to actual error conditions.
2Stability of the object's composition
If error correction is performed a fixed number of times, then error correction sequence is maintained, but correction cannot be performed on input data with multitude of random errors
Solution Approach 1:
The patent makes the error correction process dynamic by allowing the repetition count to vary from 0 to 3 based on error severity. For data with many random errors, the system can perform up to 3 correction iterations, while for clean data, zero corrections are performed. This dynamic adaptation enables the system to handle varying error patterns effectively while maintaining procedural stability through consistent decision-making logic.
Solution Approach 2:
The system performs preliminary error detection using EDC before committing to a correction sequence. Based on this preliminary assessment, it determines the appropriate number of correction iterations in advance, allowing it to prepare the correct correction strategy before execution. This preliminary action enables the system to handle diverse error patterns effectively.
3Reliability
If more than two repetitions of error correction are performed within one block cycle, then error correction capability is improved, but operating frequency must increase above 130 MHz
Solution Approach 1:
The patent implements dynamic repetition control where the number of correction iterations (0-3) is determined by error conditions rather than being fixed. This allows the system to perform up to 3 repetitions when needed for high reliability without requiring continuous high-speed operation, as corrections are only intensified when errors are actually present in the data stream.
Solution Approach 2:
The system changes the repetition parameter dynamically based on error detection results. When EDC indicates clean data, zero repetitions are performed; when errors are detected, the system adjusts the repetition count to 1-3 as needed. This parameter adaptation allows multiple corrections when necessary without requiring sustained high operating frequencies, as the system only intensifies processing when actual errors demand it.
4Reliability
If 9-bit data with erasure flag is used, then erasure correction capability is improved, but data processing complexity increases
Solution Approach 1:
The patent extracts erasure information from the data stream and processes it separately through dedicated erasure correction logic. Rather than mixing erasure flags with regular data bits throughout the processing pipeline, the system separates erasure detection, erasure information generation, and erasure correction into distinct functional blocks. This extraction approach improves erasure correction capability while managing complexity through modular organization.
Solution Approach 2:
The system introduces an intermediary erasure correction module that sits between the standard PI/PO correction chain and the data output. This intermediary component handles erasure-specific processing separately, allowing the main correction pipeline to remain unchanged while adding erasure correction capability. The intermediary approach improves reliability without significantly increasing overall system complexity.
Data Source
AI summary
In an apparatus and a method for processing digital signals in an optical disc system, the digital signal processing apparatus includes an EDC unit that processes data that is demodulated by an EFM demodulator to determine in advance whether input data requires error correction. When EDC determination indicates that the input data has no errors, the apparatus does not carry out error correction on the data. Only when it is determined that the input data has errors, the apparatus performs error correction. Accordingly, data processing efficiency is improved. The digital signal processing apparatus repeats error correction on data having errors to a maximum of n times according to the quantity of errors. The number of error correction repetitions is made variable in order to maximize error correction capability. Furthermore, the apparatus converts erasure information generated when EFM demodulation is carried out into erasure location on a GF(2^8) field and adds a 10-byte erasure location to the back of the parity of each PI codeword to use it for PI erasure correction. Accordingly, PI erasure correction can be efficiently performed.


