ISDB-T Time Deinterleaver Architecture With Reduced Memory Pointers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

OFDM-based communication systems, such as ISDB-T, face challenges in reducing the complexity and area of deinterleaver designs due to large memory requirements, leading to increased power consumption and complexity from numerous memory pointers implemented as flip-flops.

Innovation Solution

The proposed solution involves a deinterleaver apparatus with a practical OFDM symbol counter of 25 to 30 bits, a divider for calculating intra-buffer offsets, and lookup tables for obtaining delay buffer sizes and buffer base addresses, implemented using ROM or dynamic arithmetic calculations, which reduces the need for large RAM-based designs and flip-flops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RAM-based deinterleaver design with large memory pointers is used, then deinterleaving functionality is achieved, but chip area and power consumption increase

Engineering Contradiction:
Improvedeinterleving functionalityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the deinterleaver design into multiple components: a smaller RAM with reduced pointers, lookup tables for buffer base addresses, and arithmetic logic for calculating intra-buffer offsets. This segmentation allows the system to achieve the same deinterleaving functionality with significantly reduced chip area by distributing the computational burden across multiple specialized components rather than relying on a single large RAM structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces lookup tables as intermediary structures that store pre-computed buffer base addresses. These lookup tables act as mediators between the main RAM and the deinterleaving logic, allowing the system to access buffer information efficiently without requiring large pointers in the main RAM, thereby reducing the overall chip area while maintaining functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If large number of memory pointers are implemented as flip-flops, then deinterleaver functionality is maintained, but power consumption increases

Engineering Contradiction:
Improvedeinterleaver functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the pointer functionality into two parts: a smaller set of actual memory pointers implemented as flip-flops, and virtual pointers generated through arithmetic calculations using lookup tables. This segmentation reduces the number of physical flip-flops required, directly lowering power consumption while maintaining the ability to address all necessary buffer locations through the combination of real and virtual pointers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates virtual copies of pointer information by storing buffer base addresses in lookup tables. Instead of implementing physical pointers for all possible buffer locations, the system uses these table-based copies to generate the necessary addressing information, significantly reducing the number of active flip-flops and their associated power consumption.

Inventive Principle:
Principle #26Copying

3Duration of action of moving object

If practical OFDM symbol counter with 25 to 30 bits is used, then uninterrupted television viewing time is maintained, but counter complexity increases

Engineering Contradiction:
Improveuninterrupted television viewing timeVSAvoidcounter complexity
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The patent implements a practical OFDM symbol counter with 25 to 30 bits, which provides sufficient counting capacity for uninterrupted television viewing times without implementing the full theoretical maximum bit width. This partial action approach achieves the required duration coverage for typical viewing scenarios while keeping the counter complexity and resource requirements at manageable levels.

Inventive Principle:
Principle #16Partial or excessive action

4Productivity

If lookup tables are implemented using ROM, then buffer base addresses are obtained efficiently, but memory usage increases

Engineering Contradiction:
Improveaddress retrieval efficiencyVSAvoidmemory usage
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent segments the memory structure by implementing lookup tables as separate ROM components dedicated to storing buffer base addresses. This segmentation allows the system to use efficient ROM-based address retrieval for the specific lookup table data while keeping the main RAM usage minimized, as the ROM structures are optimized for their specific addressing function rather than general-purpose storage.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7764595B2Area and power efficient architectures of time deinterleaver for ISDB-T receivers
Publication Date: 2010.07.27 ATMEL CORP
  • US7764595B2 patent drawing
  • US7764595B2 patent drawing
  • US7764595B2 patent drawing

AI summary

A method and apparatus for de-interleaving interleaved data in a deinterleaver memory in an Orthogonal Frequency Division Multiplexing (OFDM) based Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver. In different embodiments, the apparatus comprises of a OFDM symbol counter along with a divider or a buffer pointer RAM with circular pointer logic, a first lookup table to obtain delay buffer size and interleaving lengths for a given OFDM transmission layer, and a second lookup table to obtain buffer base address and interleaving lengths for a given OFDM transmission layer.