Dynamic Fail Bit Repair Using Global and Local Redundancy
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Solution Overview
Problem
Existing repair algorithms for integrated circuit chips often deplete Local Redundancy (LR) circuits after initial repairs, rendering subsequent repairs impossible and rendering the chip useless due to scarcity of LR circuits.
Innovation Solution
A method and device that determine a fail bit repair solution by utilizing Global Redundancy (GR) circuits and LR circuits, where the region level of a local region with a fail bit is assessed to decide whether to replace the preliminary LR circuit with a GR circuit or use the preliminary LR circuit for repair, ensuring sufficient resources for subsequent repairs by acquiring and managing the number of available GR and LR circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of repair
If existing repair algorithms use LR circuits for initial repairs, then repair capability is provided for initial fail bits, but LR circuits become scarce or lacking after repair, rendering subsequent repairs impossible
Solution Approach 1:
The repair algorithm dynamically adjusts the repair strategy based on the current state of available redundancy circuits. It evaluates the number of available GR and LR circuits before each repair operation and adapts the repair approach accordingly, transitioning from static to dynamic repair decision-making to preserve repair capability throughout the process
Solution Approach 2:
The algorithm changes the repair parameters by introducing region level classification (free region vs. restricted region) and using this classification to determine repair methodology. This parameter change enables differentiated repair strategies that preserve LR circuits for critical regions while allowing GR circuit usage in other regions
2Adaptability or versatility
If GR circuits are used to repair fail bits in any local region, then repair flexibility is improved, but LR circuits may be depleted faster, reducing subsequent repair options
Solution Approach 1:
The patent applies local quality by classifying different local regions into free regions and restricted regions with different repair policies. Restricted regions prioritize LR circuit usage to preserve them, while free regions allow GR circuit usage, creating localized repair strategies that balance flexibility and resource preservation
Data Source
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AI summary
The present disclosure relates to a method and device for determining a fail bit repair solution, and a chip, relates to the field of integrated circuit technology, and is applicable to a scene for repairing a fail bit in the chip. The method for determining a fail bit repair solution is as follows. A local region to be repaired including the fail bit is determined. A preliminary repair LR circuit for repairing the local region to be repaired is determined (S210). A region level of the local region to be repaired is determined (S230) according to the number of available GR circuits other than any replacement GR circuit configured for replacing the preliminary repair LR circuit and the number of available LR circuits. It is controlled, according to the region level of the local region to be repaired, to repair the fail bit by the GR circuit or the LR circuit (S240). With the present disclosure, chip process yield may be improved effectively, reducing the chance of a chip turning useless.