Dynamic Instruction Version Selection for Variable String Processing

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Solution Overview

Problem

Traditional string operations in computing environments, such as those using the z/Architecture, are inefficient due to their reliance on known string lengths, which do not align with variable length termination semantics, leading to suboptimal performance.

Innovation Solution

Implementing string operations using a non-looping sequence of internal operations within the instruction pipeline, such as the Move String (MVST) and Compare Logical String (CLST) instructions, which execute concurrently without the need for microcode entry and exit overhead, leveraging vector facilities for parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional string operations are implemented using microcode with loops, then the operations can handle variable length strings, but the processing speed deteriorates due to microcode entry/exit overhead and loop iterations

Engineering Contradiction:

Improvevariable length string handlingVSAvoidprocessing speed

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent replaces the microcode-based mechanical processing system with a direct hardware instruction execution system. By implementing string operations as native hardware instructions (MVST, CLST) rather than microcode sequences, the system eliminates microcode entry/exit overhead and enables direct execution in the instruction pipeline, thereby resolving the speed penalty while maintaining variable length string handling capability

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent segments the string processing function into dedicated hardware instruction units (MVST for move, CLST for compare) that operate independently within the instruction pipeline. This segmentation allows concurrent execution of string operations without requiring loop iterations, improving processing speed while preserving adaptability to variable length strings through the defined terminator mechanism

Inventive Principle:

Principle #1Segmentation

2Productivity

If string operations are executed as architected instructions in the instruction pipeline, then processing efficiency improves, but the complexity of the instruction set increases

Engineering Contradiction:

Improveprocessing efficiencyVSAvoidinstruction set complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent implements multiple string operations (Move String MVST, Compare Logical String CLST, and other sequence operations) using a unified hardware instruction framework. These instructions share common operational characteristics (defined terminator, non-looping execution, vector facility leverage) allowing the system to handle diverse string processing needs through a standardized mechanism, improving productivity while controlling instruction set complexity through functional consolidation

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10789069B2Dynamically selecting version of instruction to be executed

Publication Date: 2020.09.29 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

Dynamically selecting a version of an instruction to be executed. Based on processing, a version of an instruction to be executed is selected. The selecting chooses the version from a plurality of versions of instructions. The plurality of versions of instructions including an architected version and another version different from the architected version. The version of the instruction selected for execution is executed.