Dynamic Interference Compensation in Non-Volatile Memory

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Solution Overview

Problem

Non-volatile memory storage devices face degradation in endurance and read performance due to inter-cell interference (ICI) caused by increased parasitic capacitance between neighboring cells as cell sizes shrink, leading to errors and reduced reliability.

Innovation Solution

A method for dynamically estimating interference compensation thresholds by computing histograms, clustering interference states, and adjusting read thresholds to mitigate interference noise, thereby improving endurance and read performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cell sizes are scaled down to increase storage capacity, then storage density is improved, but inter-cell interference increases causing errors and degradation in endurance and read performance

Engineering Contradiction:

Improvestorage capacityVSAvoidread performance

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by implementing interference compensation specifically for affected memory rows rather than uniformly across the entire memory array. The system identifies rows adjacent to programmed rows and applies compensation thresholds only to those specific locations, making the quality adjustment localized to where interference occurs.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the read threshold parameter dynamically based on interference conditions. Instead of using a fixed threshold, the system computes compensation thresholds by adding interference compensation values to base thresholds, effectively changing the electrical parameter to counteract the harmful interference effects of scaled-down cell dimensions.

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If memory cell sizes are scaled down to increase storage capacity, then storage density is improved, but parasitic capacitance coupling between neighboring cells increases

Engineering Contradiction:

Improvestorage densityVSAvoidparasitic capacitance coupling

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful parasitic capacitance coupling into a manageable parameter by measuring and compensating for it. The system uses the interference that occurs during programming to gather data about coupling strengths, then applies compensation thresholds that transform this previously harmful effect into a corrected read operation.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements feedback by using information from programming operations to inform subsequent read operations. The system monitors programming activity on adjacent rows and uses this feedback to adjust read thresholds dynamically, creating a closed-loop system that responds to actual interference conditions.

Inventive Principle:

Principle #23Feedback

3Productivity

If fast programming methods are used to improve write speed, then programming speed is improved, but interference to neighboring rows increases

Engineering Contradiction:

Improveprogramming speedVSAvoidinterference to neighboring rows

Core Design Contradiction:

ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by pre-computing interference compensation thresholds before performing read operations on potentially affected rows. When programming occurs on adjacent rows, the system proactively calculates compensation values based on expected interference patterns, so that when the read operation occurs, the compensation is already in place to counteract the interference.

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The patent performs preliminary action by gathering interference data during programming operations and using this information to establish compensation strategies before actual read operations occur. The system prepares compensation thresholds in advance based on programming patterns, reducing the impact of interference before it affects read accuracy.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and efficiency of non-volatile memory storage devices by reducing bit error rates and extending their usage through effective decoupling of inter-cell interference.

Implementation Method 1

the scaling down of the memory cell sizes may cause an increase in the parasitic capacitance coupling between neighboring cells (floating gate transistors) in a memory block. This phenomenon, called 'inter-cell interference' (ICI)

Methodology Applied

Scientific EffectParasitic capacitance coupling: Parasitic Capacitance

Data Source

PatentUS11854631B2System and method for dynamic compensation for multiple interference sources in non-volatile memory storage devices

Publication Date: 2023.12.26 KIOXIA CORP

AI summary

A method for dynamically estimating interference compensation thresholds of a page of memory includes computing a histogram and a corresponding threshold based on a plurality of interference states of an interference source; clustering the plurality of interference states to determine an effective number of interference states; and estimating a read threshold to dynamically compensate an interference noise associated with each interference state of the effective number of interference states of the target row based on the histogram.