Dynamic Time-Constant Level Acquisition for Optical DC Offset Removal

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In gigabit passive optical networks, the OLT faces challenges in compensating for signal degradation due to asynchronous, out-of-phase, and amplitude-varying upstream optical signals from multiple ONUs, which results in DC offset issues that need to be addressed quickly to maintain communication efficiency.

Innovation Solution

A level acquisition circuit with a dynamic time constant is implemented, utilizing a switched resistance network and RC circuit to dynamically adjust time constants to remove DC offsets from differential signals, ensuring efficient signal compensation within a short time frame.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a fixed time constant is used in the level acquisition circuit, then the circuit design is simple, but the DC offset removal is too slow to keep up with rapid signal level changes in burst mode transmission

Engineering Contradiction:
ImproveDC offset removal speedVSAvoidlevel acquisition circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies the dynamics principle by making the time constant of the level acquisition circuit variable rather than fixed. The circuit dynamically adjusts its time constant based on the detected signal burst characteristics, allowing fast response during actual bursts while maintaining stability during idle periods. This resolves the contradiction by enabling rapid DC offset removal when needed without requiring a permanently complex high-speed circuit configuration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the time constant parameter of the level acquisition circuit from a fixed value to a variable parameter that can be adjusted based on operating conditions. By modifying this key parameter dynamically, the circuit achieves both fast DC offset removal during bursts and simplified operation during idle times, resolving the speed-complexity contradiction.

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If the level acquisition circuit responds too quickly to signal changes, then DC offset is removed rapidly, but signal jitter increases due to premature response

Engineering Contradiction:
Improvetime to remove DC offsetVSAvoidsignal jitter
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The circuit dynamically adjusts its response characteristics based on the detected signal burst presence. During actual bursts, the circuit enables a shorter time constant for rapid DC offset removal. During idle periods or transition phases, it uses a longer time constant to filter out noise and prevent premature response. This dynamic adaptation resolves the contradiction between fast response and jitter prevention.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The level acquisition circuit performs preliminary detection of signal burst characteristics before fully engaging the fast DC offset removal mode. By detecting the presence and characteristics of incoming bursts in advance, the circuit can prepare the appropriate time constant setting, ensuring rapid response only when legitimate signals are present, thereby preventing jitter from premature responses.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If a long preamble is used to allow level acquisition, then DC offset removal is more accurate, but the overhead increases and throughput decreases

Engineering Contradiction:
Improvelevel acquisition accuracyVSAvoidnetwork throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent makes the time constant dynamic, allowing the circuit to achieve accurate level acquisition with shorter preambles by adapting its response characteristics to the actual signal conditions. The circuit can quickly determine when a burst is present and adjust its time constant accordingly, eliminating the need for excessively long preambles while maintaining acquisition accuracy, thus resolving the precision-throughput contradiction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The level acquisition circuit skips unnecessary waiting time by using burst detection to trigger fast DC offset removal. Instead of always waiting for a long preamble to ensure accurate acquisition, the circuit can rapidly acquire levels when bursts are detected, effectively 'rushing through' the acquisition process when conditions permit, thereby reducing overhead and increasing throughput while maintaining sufficient accuracy.

Inventive Principle:
Principle #21Skipping (Rushing through)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively removes DC offsets from upstream signals in a controlled manner, improving communication efficiency and throughput by aligning phases and compensating for amplitude variations, thereby enhancing the overall performance of the OLT in gigabit passive optical networks.

Implementation Method 1

Capacitor 154 and switched resistance network 162 create a dynamic time constant for the differential signal

Methodology Applied
Scientific EffectRC circuit time constant:

Implementation Method 2

Capacitor 154 is coupled between terminal 150 and node 156... Capacitor 158 is coupled between terminal 152 and node 160

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS10862466B2Dynamic time constant for quick decision level acquisition
Publication Date: 2020.12.08 SEMTECH CORP
  • US10862466B2 patent drawing
  • US10862466B2 patent drawing
  • US10862466B2 patent drawing

AI summary

A circuit controls a dynamic time constant to remove DC offset from a received optical data signal. The circuit has a first capacitor coupled between a first terminal and a second terminal. A first resistance network is coupled between the second terminal and a reference voltage. A control circuit has a first output coupled to a control input of the first resistance network. The control circuit monotonically increases an effective resistance of the first resistance network to increase the dynamic time constant. The first resistance network has a resistor coupled to the second terminal, and a transistor with a first conduction terminal coupled to the resistor, a second conduction terminal coupled to the reference voltage, and a control terminal coupled to the first output of the control circuit. The first capacitor has a variable capacitance. The monotonic increase in the dynamic time constant can be linear or non-linear.