Dynamic Load Adjustment for Stable Memory Programming Voltage
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Solution Overview
Problem
Non-volatile memory technologies face challenges in maintaining accurate programming voltage levels during program operations, which is crucial for reliable data storage, especially in portable devices where power supply stability is essential.
Innovation Solution
A memory system comprising a decoder, memory array, loads, load detection circuit, and load control circuit dynamically adjusts the number of loads coupled to the power supply voltage based on the number of memory units required for programming, ensuring a stable programming voltage by parallel coupling of loads to the power supply voltage transmission path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the programming voltage is increased to ensure accurate voltage levels for program operations, then the reliability of data storage is improved, but the power consumption and complexity of voltage regulation increase
Solution Approach 1:
The patent implements dynamic load adjustment during program operations. The load control circuit dynamically connects or disconnects loads based on the number of memory units being programmed, allowing the programming voltage to be maintained at accurate levels only when needed, rather than using continuous complex voltage regulation
Solution Approach 2:
The patent changes the load parameter dynamically during program operations. By adjusting the number of active loads based on the operation requirements, the system maintains accurate programming voltage when necessary while reducing complexity and power consumption during other operations
2Stability of the object's composition
If the number of loads is increased to maintain stable programming voltage, then the voltage stability is improved, but the power consumption increases
Solution Approach 1:
The load control circuit dynamically adjusts the number of active loads based on the actual number of memory units being programmed. During program operations, sufficient loads are connected to maintain voltage stability, while during other operations, loads are disconnected to reduce power consumption
Solution Approach 2:
The patent applies partial action by connecting only the necessary number of loads required for the current operation. Instead of keeping all loads connected continuously, the system connects exactly the number of loads needed for stable programming voltage during program operations, avoiding excessive power consumption
3Manufacturing precision
If dynamic load adjustment is implemented to stabilize programming voltage, then the program operation accuracy is improved, but the device complexity increases
Solution Approach 1:
The load control circuit is segmented into multiple independent load units that can be individually controlled. Each load corresponds to specific memory units, allowing the system to adjust loads in discrete steps based on the number of memory units being programmed, rather than using a complex continuous control mechanism
Solution Approach 2:
The load control circuit uses feedback from the program operation status to automatically adjust the number of active loads. The circuit detects whether program operations are being performed and accordingly connects or disconnects loads, providing accurate program operation voltage stability through automatic feedback control
Data Source
AI summary
An operation method of a memory includes the following steps: determining the number of memory units required to update the content stored therein when the memory is performing a program operation based on the N-bit input data and accordingly generate a first determination result; and providing (N−M) number of loads to a source line decoder of the memory if the first determination result indicates that there are M number of memory units required to update the content stored therein, and thereby coupling the (N−M) number of the provided loads to a transmission path of a power supply voltage in parallel, wherein N and M are natural numbers. A memory is also provided.