Dynamic On-Chip Memory Calibration Using Wordline Voltage Proxy

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Solution Overview

Problem

Modern semiconductor memory, such as three-dimensional NAND flash memory, experiences early retention due to shared charge trap layers, leading to fast charge loss and difficulties in maintaining read voltage and string current, which affects data retention and read operation success.

Innovation Solution

The implementation of dynamic on-chip calibration methods for memory control signals, using a wordline regulator output or replica as a proxy for local wordline voltage, allows for real-time calibration of pass voltage and wordline read-verify voltage without impacting read or program times, effectively addressing early retention issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dynamic on-chip calibration is implemented, then read operation reliability is improved, but device complexity increases

Engineering Contradiction:
Improveread operation reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The calibration mechanism operates autonomously within the memory device, using internal resources (wordline regulator output, replica circuits) to perform self-calibration without external intervention. The system automatically detects and compensates for charge loss effects, making the calibration process self-contained and reducing the need for complex external calibration equipment or procedures.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent implements feedback by using the wordline regulator output or replica as a proxy to monitor actual wordline voltage conditions during read operations. This feedback information is used to dynamically adjust calibration parameters, allowing the system to adapt to changing conditions and maintain reliable read operations while managing complexity through intelligent control.

Inventive Principle:
Principle #23Feedback

2Reliability

If calibration is performed dynamically during read operations, then data retention is enhanced, but read time increases

Engineering Contradiction:
Improvedata retentionVSAvoidread time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The calibration mechanism performs preliminary calibration actions during idle periods or background processes, preparing calibration data and adjusting parameters before they are needed for actual read operations. This allows the system to maintain accurate calibration without interrupting or extending the primary read operation timeline, as the calibration work is completed in advance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuous calibration activity that operates concurrently with or alongside read operations rather than sequentially. By using background calibration processes and overlapping calibration tasks with read operations, the system achieves continuous improvement of data retention without adding measurable delay to the primary read function.

Inventive Principle:
Principle #20Continuity of useful action

3Manufacturing precision

If calibration uses wordline regulator output as proxy, then manufacturing precision is improved, but measurement precision requirements increase

Engineering Contradiction:
Improvemanufacturing precisionVSAvoidmeasurement precision
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent introduces the wordline regulator output or replica as an intermediary element that indirectly reflects actual wordline voltage conditions. Instead of directly measuring the difficult-to-access wordline voltage, the system uses this intermediary proxy that is easier to obtain and process, while still providing sufficient calibration information. This approach balances manufacturing precision with feasible measurement requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a copy or replica of the wordline signal (the replica) that mirrors the actual wordline voltage characteristics without requiring direct access to the original wordline. This copy can be measured and processed more easily, providing sufficient calibration data while reducing the measurement precision burden on the original wordline measurement system.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12165692B2Systems and methods for performing dynamic on-chip calibration of memory control signals
Publication Date: 2024.12.10 MICRON TECHNOLOGY INC
  • US12165692B2 patent drawing
  • US12165692B2 patent drawing
  • US12165692B2 patent drawing

AI summary

Systems and methods of dynamically calibrating memory control signals during increase of wordline voltage for memory technologies subject to charge loss are disclosed. In one aspect, an exemplary method may comprise using an internal node, such as a wordline regulator output or return feedback line or a replica of the wordline, as proxy for the local wordline voltage. In one or more further embodiments, the proxy signal may be converted to digital signal or code and even determined in the background before the signal is needed for calibration. As a function of the disclosed technology, calibration of memory control signals, such as pass voltage and wordline read-verify voltage, may be performed during increase of the wordlines voltage with no impact or penalty on read/program time.