Dynamic Memory Termination Impedance Switching

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Solution Overview

Problem

Current memory systems face performance reduction due to high impedance default termination values in DDR3 I/O interfaces, leading to decreased timing and voltage margins, especially as memory speeds increase, as they fail to dynamically adjust termination impedance settings effectively.

Innovation Solution

Implementing a method and apparatus that dynamically switch between programmable finite termination impedance value settings for memory I/O interfaces in response to a termination signal level, allowing ranks not being accessed to have a first finite impedance value and ranks being accessed to transition to a second impedance value, thereby improving signal quality without transitioning to high impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the termination impedance of unaccessed ranks is set to high impedance to save power, then power consumption is reduced, but timing and voltage margins on read signals are reduced

Engineering Contradiction:
Improvepower consumptionVSAvoidtiming and voltage margins
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The termination impedance is made dynamically adjustable between two finite states based on access status. Unaccessed ranks use a first finite impedance value for power efficiency, while accessed ranks switch to a second finite impedance value for optimal signal quality, eliminating the need for high impedance states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the termination impedance parameter from traditional high impedance (infinite) to programmable finite impedance values. This allows optimization of both power consumption and signal quality by selecting appropriate finite impedance values for different operational states

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the termination impedance is set to a single finite value for all ranks, then signal quality is improved, but power consumption increases due to continuous electrical path from power supply to ground

Engineering Contradiction:
Improvesignal qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The termination impedance configuration is made dynamic, allowing the system to switch between different finite impedance values based on whether ranks are accessed or unaccessed. This eliminates the need for continuous power consumption while maintaining signal quality when needed

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Different termination impedance values are applied locally to different ranks based on their access status. Accessed ranks receive optimal finite impedance for signal quality, while unaccessed ranks use a different finite impedance value that reduces power consumption

Inventive Principle:
Principle #3Local quality

3Reliability

If the termination impedance is dynamically switched between high impedance and finite impedance, then timing and voltage margins are improved, but signal reflections occur during transitions

Engineering Contradiction:
Improvetiming and voltage marginsVSAvoidsignal reflections
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The invention changes from switching between high impedance and finite impedance to switching between two finite impedance values. This parameter change eliminates signal reflections during transitions because finite impedance values provide continuous impedance matching, preventing the reflections that occur with high impedance states

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3324411B1A method and apparatus for dynamic memory termination
Publication Date: 2021.04.28 INTEL CORP
  • EP3324411B1 patent drawingFigure 1
  • EP3324411B1 patent drawingFigure 2A
  • EP3324411B1 patent drawingFigure 2B

AI summary

Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory input-output (I/O) interface of a memory in response to a termination signal level. The method comprises: setting a first termination impedance value setting for a termination unit of an input-output (I/O) interface of a memory; assigning the first termination impedance value setting to the termination unit when the memory is not being accessed; and switching from the first termination impedance value setting to a second termination impedance value setting in response to a termination signal level.