Dynamic Parallel Memory Access for Contactless IC Cards

Solution Overview

Problem

Contactless IC cards require a minimum transmission field strength to operate, which is impacted by the internal memory's current properties, particularly in non-volatile memories, leading to high power consumption and potential programming errors due to insufficient energy for simultaneous bit access.

Innovation Solution

An apparatus and method that dynamically adjust the number of memory bits accessed in parallel based on available power, using a measurement circuit to determine power availability and an access control circuit to control read/write operations, ensuring sufficient power for fast access while minimizing energy usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the speed of memory access is reduced to reduce current consumption, then power consumption is reduced, but programming time increases

Engineering Contradiction:

Improvepower consumptionVSAvoidprogramming time

Core Design Contradiction:

Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent implements dynamic adjustment of the number of bits accessed in parallel based on available power levels. The system monitors power availability and adapts the parallel access width accordingly, allowing fast programming when power is abundant and reduced parallelism when power is limited, thus resolving the contradiction between power consumption and programming time

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter of parallel bit access width based on power conditions. By varying the number of bits accessed in parallel (e.g., from 8-bit to 1-bit parallel access), the system optimizes the trade-off between current consumption and programming speed according to available power

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If the number of bits accessed in parallel is reduced to reduce current consumption, then power consumption is reduced, but programming time increases

Engineering Contradiction:

Improvepower consumptionVSAvoidprogramming time

Core Design Contradiction:

Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent implements dynamic adjustment of the number of bits accessed in parallel based on available power levels. The system monitors power availability and adapts the parallel access width accordingly, allowing fast programming when power is abundant and reduced parallelism when power is limited, thus resolving the contradiction between power consumption and programming time

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameter of parallel bit access width based on power conditions. By varying the number of bits accessed in parallel (e.g., from 8-bit to 1-bit parallel access), the system optimizes the trade-off between current consumption and programming speed according to available power

Inventive Principle:

Principle #35Parameter changes

3Productivity

If all bits are programmed simultaneously to minimize programming time, then programming speed is maximized, but current consumption increases leading to potential programming errors

Engineering Contradiction:

Improveprogramming speedVSAvoidprogramming accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The system dynamically adjusts the parallel bit access width based on real-time power availability measurements. When sufficient power is detected, higher parallelism is enabled for fast programming; when power is insufficient, the system reduces parallelism to prevent current spikes that could cause programming errors, thus maintaining reliability

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where the system measures available power and uses this information to control the number of bits accessed in parallel. This closed-loop control ensures that programming operations are performed only when power conditions are sufficient, preventing programming errors caused by insufficient power

Inventive Principle:

Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption and transmission field strength requirements, preventing programming errors by dynamically adjusting parallel bit access in contactless IC cards, especially during write/erase operations in non-volatile memories.

Implementation Method 1

the card and the reader according to an established communication protocol, and on the other hand to power the contactless card, which derives the energy required for its operation by induction

Methodology Applied

Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS7830719B2Power dependent memory access

Publication Date: 2010.11.09 INFINEON TECHNOLOGIES AG

AI summary

An apparatus and method of accessing a memory by determining available power, and accessing a number of bits of the memory in parallel, wherein the number of bits accessed in parallel is based at least in part on the available power.