Dynamic Power Fill Circuit for IC Voltage Stability

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Solution Overview

Problem

High data traffic integrated circuits face significant power consumption issues, leading to large power supply current fluctuations that can cause damage or failure, particularly due to high-frequency current draws exceeding the capacity of conventional power delivery networks.

Innovation Solution

The implementation of dynamic 'power fill' circuits that execute dummy operations to maintain stable power consumption, adjusting power fill levels based on mission mode activity and data pattern dependence, thereby minimizing dynamic voltage drops and reducing power dissipation through strategic activation and deactivation of power fill circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high data traffic ICs operate at full performance, then data throughput is improved, but power supply current fluctuations increase causing voltage drops and potential damage

Engineering Contradiction:
Improvedata throughputVSAvoidvoltage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The power fill circuit performs preliminary action by pre-charging power distribution network capacitance before high-current demand occurs. The circuit monitors data traffic patterns and activates dummy circuits in advance to maintain baseline current flow, ensuring voltage stability when actual data operations commence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The power fill circuit acts as an intermediary between the power supply and the high-traffic data circuits. It introduces dummy circuits that mediate power consumption, absorbing current fluctuations and preventing direct transmission of voltage drops to the main data paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If power fill circuits are continuously activated to maintain stable power consumption, then voltage stability is improved, but power dissipation increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidpower dissipation
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The power fill circuit implements dynamic control by continuously monitoring data traffic patterns and adjusting dummy circuit activation accordingly. When data traffic is high, power fill is reduced or disabled. When data traffic drops, power fill circuits are activated to maintain baseline power consumption and voltage stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by switching between different power fill levels based on detected data patterns. The control circuit adjusts the number of active dummy circuits, transitioning the power consumption parameter dynamically to match actual operational needs while maintaining stability thresholds.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If decoupling capacitors are used to prevent high frequency current, then voltage drop is reduced, but current draw through PG pins increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcurrent draw
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The invention replaces the passive mechanical approach of decoupling capacitors with an active electronic control system. Instead of relying solely on capacitor charging/discharging, the system uses monitored data patterns to actively control dummy circuit activation, substituting passive energy storage with active energy management.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9455027B1Power management system for high traffic integrated circuit
Publication Date: 2016.09.27 INFINEON TECHNOLOGIES LLC
  • US9455027B1 patent drawing
  • US9455027B1 patent drawing
  • US9455027B1 patent drawing

AI summary

An integrated circuit (IC) device can include a memory array section comprising a plurality of memory arrays that each include memory cells for storing data values; a data path section having switching circuits configured to enable data paths between the memory arrays and a plurality of input/outputs (I/Os) of the IC device; and a power fill control circuit configured to activate power-fill circuits in the IC device to perform non-mission mode operations that consume current, the amount of non-mission mode operations varying in response to mission mode circuit activity in the IC device; wherein mission mode circuit activity includes circuit activity resulting from a user input to the IC device.