Dynamic Precharge Control Circuit for DRAM Power Reduction

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Solution Overview

Problem

Dynamic Random-Access Memory (DRAM) devices experience increased power consumption due to active current IDD0 when entering a row active state without subsequent read/write operations, leading to wasted energy and inefficiency.

Innovation Solution

A memory circuit with a precharge circuit and control circuit that dynamically manages precharge voltages by disconnecting power supply ends from the data end when not in active use, reconnecting only when a read/write operation is initiated or completed, thereby optimizing power usage and reducing unnecessary precharging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory enters a row active state without subsequent read/write operations, then the precharge circuit maintains connection to power supply ends, but power consumption increases due to active current IDD0

Engineering Contradiction:

Improvememory operation readinessVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of the precharge circuit by introducing a control signal that adjusts the circuit state based on operational needs. When no read/write operations are scheduled, the control signal disconnects the precharge circuit from power supply ends, reducing power consumption. When operations are needed, the circuit reconnects to maintain operational readiness, thus dynamically adapting the power state to actual usage requirements

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms through control circuits that monitor the state of read/write operations and adjust the precharge circuit accordingly. The control signal is generated based on feedback about whether read/write operations are pending, creating a closed-loop system that optimizes power consumption while ensuring the memory is ready when needed

Inventive Principle:

Principle #23Feedback

2Productivity

If the precharge circuit continuously maintains connection to power supply ends, then memory is ready for immediate read/write operations, but unnecessary precharging occurs during idle states wasting energy

Engineering Contradiction:

Improveread/write operation readinessVSAvoidwasted precharge energy

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The precharge circuit transitions from a static always-connected state to a dynamic state controlled by operational signals. The control circuit adjusts the connection state based on whether read/write operations are imminent, disconnecting during idle periods to eliminate wasted precharge energy while maintaining quick readiness when operations are scheduled

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements periodic assessment of operational needs through control signals that activate the precharge circuit only when read/write operations are scheduled. This periodic activation pattern replaces continuous operation, reducing energy waste during idle intervals while ensuring the circuit is ready when operations occur

Inventive Principle:

Principle #19Periodic action

3Use of energy by moving object

If the precharge circuit disconnects from power supply ends during idle states, then power consumption is reduced, but connection time is needed to be minimized to avoid affecting read/write operation speed

Engineering Contradiction:

Improvepower consumptionVSAvoidprecharge connection time

Core Design Contradiction:

Use of energy by moving objectVSLoss of time

Solution Approach 1:

The control circuit anticipates read/write operations by activating the precharge circuit in advance when operations are scheduled. This preliminary action ensures the circuit is ready before operations begin, minimizing the impact on read/write speed while maintaining power savings during extended idle periods

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements rapid connection and disconnection of the precharge circuit based on operational signals. When operations are needed, the circuit quickly reconnects and maintains connection only for the necessary duration, then rapidly disconnects again. This rushing through the necessary connection time minimizes energy consumption while ensuring operational readiness

Inventive Principle:

Principle #21Skipping (Rushing through)

Data Source

PatentUS11670349B2Memory circuit, memory precharge control method and device

Publication Date: 2023.06.06 CHANGXIN MEMORY TECH INC

AI summary

A memory circuit includes a precharge circuit and control circuit. The precharge circuit comprises a first precharge circuit, second precharge circuit, first power supply end, second power supply end, first control end, second control end and data end. The first precharge circuit is connected with the first power supply end, first control end and data end. The second precharge circuit is connected with the second power supply end, second control end and data end. A first precharge voltage is input into the first power supply end, and a second precharge voltage is input into the second power supply end. The control circuit is configured to control connection and disconnection between the data end and second power supply end and to control connection and disconnection between the data end and first power supply end.