Dynamic Precharge Voltage Switching in DRAM I/O Circuits

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Solution Overview

Problem

Existing data input/output circuits in DRAMs consume significant area and degrade data characteristics during read operations due to inefficient precharge voltage management and line precharging.

Innovation Solution

A data input/output circuit that includes a precharge voltage supply unit and a precharge unit, which dynamically switch between two internal voltages based on control signals to optimize precharging of input/output lines during standby and active states, and a potential retaining unit to maintain data integrity during read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single precharge voltage level is used for both standby and active states, then the circuit structure is simple, but the data characteristics are degraded during read operations

Engineering Contradiction:
Improvecircuit structureVSAvoiddata characteristics
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements dynamic precharge voltage switching by using a precharge voltage supply unit that provides different voltage levels (first voltage in standby state, second voltage in active state) based on the operational mode. This dynamic adjustment optimizes data characteristics during read operations while maintaining circuit functionality, resolving the contradiction between structural simplicity and data quality.

Inventive Principle:
Principle #15Dynamics

2Reliability

If separate precharge circuits are provided for standby and active states, then data characteristics are improved, but the area consumption increases

Engineering Contradiction:
Improvedata characteristicsVSAvoidarea consumption
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent employs a universal precharge unit that can operate with different precharge voltage levels rather than requiring separate precharge circuits for each state. This multi-functional approach allows the same hardware structure to serve both standby and active state requirements, improving data characteristics without proportionally increasing area consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the voltage parameter of the precharge signal dynamically (first voltage for standby, second voltage for active operations) rather than creating separate circuits. This parameter-based differentiation allows the system to optimize performance for different operational modes while maintaining a compact, unified circuit structure.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If precharge voltage is continuously supplied at high level, then data characteristics are maintained, but energy consumption increases

Engineering Contradiction:
Improvedata characteristicsVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic switching of precharge voltage levels based on the operational state (standby vs. active). The precharge voltage supply unit alternates between providing a first voltage level during standby and a second voltage level during active operations, optimizing energy consumption by applying higher voltage only when necessary for read operations rather than continuously.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9064554B2Data input/output circuit and semiconductor memory device including the same
Publication Date: 2015.06.23 SK HYNIX INC
  • US9064554B2 patent drawing
  • US9064554B2 patent drawing
  • US9064554B2 patent drawing

AI summary

A data input/output circuit includes a precharge voltage supply unit configured to supply a precharge voltage driven by a first internal voltage in a standby state, and supply the precharge voltage driven by a second internal voltage when an active operation is performed; and a precharge unit configured to receive the precharge voltage, precharge a first input/output line and a first inverted input/output line to a level of the first internal voltage in the standby state, and precharge the first input/output line and the first inverted input/output line by the second internal voltage when the active operation is performed.