Dynamic Read Voltage Adjustment for Nonvolatile Memory Decoding
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Solution Overview
Problem
Memory cells in non-volatile memory modules experience voltage offset over time, leading to errors in data reading, which existing decoding methods struggle to correct efficiently, especially in hard bit decoding mode, resulting in reduced decoding speed and performance.
Innovation Solution
A memory control method that sends multiple read command sequences with different voltage levels to a physical unit, calculates reference values based on the obtained data, and uses these values to determine an optimal read voltage level for improved decoding, thereby enhancing the decoding success rate without entering the slower soft bit decoding mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If hard bit decoding mode is used with single read voltage level, then decoding speed is fast and complexity is low, but decoding success rate is reduced due to voltage offset
Solution Approach 1:
The patent applies preliminary action by performing preliminary reads at multiple voltage levels (first, second, and third read voltage levels) before the final decoding operation. These preliminary reads capture data variations caused by voltage offset, enabling the system to calculate reference values that compensate for the offset in advance, thereby improving decoding success rate without sacrificing speed during actual data access.
Solution Approach 2:
The patent changes the read voltage level parameter dynamically by conducting reads at multiple different voltage levels (first read voltage level, second read voltage level, third read voltage level) rather than using a single fixed voltage level. This parameter variation allows the system to observe how data changes with voltage, calculate reference values reflecting these variations, and ultimately select the optimal voltage level for accurate decoding.
2Reliability
If soft bit decoding mode is activated with multiple read voltage levels, then decoding success rate is improved, but decoding speed is greatly reduced
Solution Approach 1:
The patent applies partial action by performing preliminary reads at multiple voltage levels (which is more than the single read in hard bit mode) but stopping before completing a full soft bit decoding process. The system calculates reference values from these partial reads and uses them to guide a single optimal read operation, achieving improved decoding success rate without the excessive computational burden and time consumption of complete soft bit decoding.
3Measurement precision
If multiple read commands are sent to obtain reference values, then data variation status is captured, but additional time and operations are required
Solution Approach 1:
The patent implements feedback by using the data obtained from preliminary reads at multiple voltage levels to calculate reference values that reflect data variation status. These reference values are then fed back into the system to determine the optimal read voltage level for the final decoding operation, creating a closed-loop control mechanism that improves measurement precision while minimizing time loss through intelligent voltage level selection.
Data Source
AI summary
A memory control method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: reading a first physical unit based on a first read voltage level to obtain first data; reading the first physical unit based on a second read voltage level to obtain second data; reading the first physical unit based on a third read voltage level to obtain third data; obtaining a first reference value which reflects a data variation status between the first data and the second data; obtaining a second reference value which reflects a data variation status between the first data and the third data; reading the first physical unit based on a fourth read voltage level to obtain fourth data according to the first reference value and the second reference value; and decoding the fourth data by a decoding circuit.