Dynamic Read Voltage Adjustment for Memory Disturbance

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Solution Overview

Problem

In semiconductor memory, program disturbance causes shifts in threshold voltage ranges of neighboring memory cells, leading to incorrect data readouts and high bit-error rates when using a fixed read voltage across different programming stages.

Innovation Solution

A method to determine the disturbance status of a target word line by assessing the influence of neighboring word lines and adjusting the read voltage accordingly to accurately read data from memory cells, employing a control portion to dynamically set the read voltage based on the disturbance status.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a fixed read voltage is used across different programming stages, then the device operation is simple, but the bit-error rate increases due to program disturbance causing threshold voltage shifts

Engineering Contradiction:
Improveread operation simplicityVSAvoiddata readout accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements dynamic adjustment of the read voltage based on the programming stage and disturbance status of neighboring word lines. The read voltage is no longer fixed but varies dynamically to compensate for program disturbance effects, thereby maintaining data readout accuracy across different programming stages while managing the complexity through structured voltage selection

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the read voltage parameter according to the programming stage and disturbance status. By adjusting the read voltage to match the shifted threshold voltage ranges caused by program disturbance, the system maintains accurate data reading despite the changing conditions during progressive programming

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If memory cells are arranged closely to increase storage density, then the area efficiency is improved, but program disturbance occurs affecting neighboring memory cells

Engineering Contradiction:
Improvememory array densityVSAvoidprogram disturbance
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful program disturbance effect into a beneficial or manageable condition by characterizing the disturbance pattern and compensating for it through dynamic read voltage adjustment. The close arrangement causing disturbance is accepted, but the disturbance is measured and compensated, turning a harmful effect into a controlled parameter

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If progressive programming is used to program pages sequentially, then the programming process is efficient, but threshold voltage ranges shift requiring read voltage adjustment

Engineering Contradiction:
Improveprogramming speedVSAvoidthreshold voltage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements a feedback mechanism where the programming stage and disturbance status are monitored, and this information feeds back to adjust the read voltage accordingly. The system continuously adapts the read voltage based on the current programming state, ensuring accurate reading throughout the progressive programming process

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary determination of the disturbance status before executing the read operation. By assessing the programming stage and predicting the threshold voltage shift in advance, the system pre-adjusts the read voltage to compensate for the expected disturbance, ensuring accurate reading

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9875811B2Method and device for reading a memory
Publication Date: 2018.01.23 MACRONIX INTERNATIONAL CO LTD
  • US9875811B2 patent drawing
  • US9875811B2 patent drawing
  • US9875811B2 patent drawing

AI summary

A method for reading data from memory cells of a target word line in a semiconductor memory includes determining a disturbance status of the target word line. The disturbance status reflects a disturbance of a neighboring word line on the memory cells of the target word line. The method further includes determining a read voltage for the target word line according to the disturbance status of the target word line and applying the read voltage to the memory cells of the target word line.