Dynamic Read Voltage Selection for Memory Drift Compensation
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Solution Overview
Problem
Memory devices face challenges in accurately determining the read voltage due to drift in threshold voltage of memory cells over time, leading to increased latency and reduced reliability in read operations.
Innovation Solution
The memory device performs concurrent drift determination operations on disjoint subsets of memory arrays by applying different pre-read voltages, determining the quantity of cells that threshold, and selecting an appropriate read voltage based on these results to account for voltage drift, thereby reducing latency and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional sequential drift determination methods are used, then device complexity is reduced, but read operation latency increases and reliability decreases
Solution Approach 1:
The memory arrays are divided into multiple disjoint subsets, allowing drift determination operations to be performed on different subsets simultaneously. This segmentation enables parallel processing of drift determination, reducing overall latency while maintaining accurate read voltage selection through multiple independent measurements.
Solution Approach 2:
Drift determination operations are performed concurrently with read operations rather than sequentially. By preparing and executing drift determination in parallel with data reading, the system eliminates the waiting time that would otherwise be required to complete drift assessment before performing reads, thereby reducing latency without compromising reliability.
2Productivity
If concurrent drift determination operations are performed on multiple disjoint subsets, then read operation latency is reduced, but device complexity increases
Solution Approach 1:
The memory system is divided into multiple independent disjoint subsets that can be processed simultaneously. Each subset operates independently with its own control signals, allowing parallel drift determination without requiring complex inter-subset coordination logic, thus managing complexity while improving throughput.
Solution Approach 2:
The control circuit is designed to execute the same drift determination algorithm across multiple disjoint subsets using unified control logic. This multi-functional approach allows a single control structure to manage concurrent operations on different subsets, reducing the need for separate dedicated circuits for each subset and thereby controlling overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces read operation latency and improves reliability by accurately determining the optimal read voltage, even in the presence of voltage drift, compared to traditional methods that do not account for drift or apply voltages sequentially.
Implementation Method 1
determining the quantity of cells that threshold
Data Source
AI summary
Methods, systems, and devices for dynamic read voltage techniques are described. In some examples, a memory device may include one or more partitions made up of multiple disjoint subsets of memory arrays. The memory device may receive a read command to read the one or more partitions and enter a drift determination phase. During the drift determination phase, the memory device may concurrently apply a respective voltage of a set of voltages to each disjoint subset and determine a quantity of memory cells in each disjoint subset that have a threshold voltage below the applied voltage. Based on a comparison between the determined quantity of memory cells and a predetermined quantity of memory cells, the memory device may select a voltage from the set of voltages and utilize the selected voltage to read the one or more partitions.