Dynamic Read Voltage Selection for Multi-Level Memory
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Solution Overview
Problem
Conventional methods for selecting read voltage levels in multi-level memory devices rely on static tables indexed by program/erase cycle counts, which do not adapt effectively to changing characteristics of memory cells over their lifetime, leading to suboptimal endurance and increased bit error rates.
Innovation Solution
A device and method that map word line indices to bin labels, with fewer labels than word lines, and then map these labels to voltage information, allowing for dynamic selection of read voltages based on the characteristics of memory pages, thereby optimizing read voltage levels and reducing bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If static tables indexed by program/erase cycle counts are used to select read voltage levels, then the device complexity is reduced and ease of operation is improved, but the reliability deteriorates due to suboptimal voltage selection as memory characteristics change over time
Solution Approach 1:
The patent implements dynamic read voltage selection by transitioning from static tables to a mechanism that adapts voltage levels based on real-time memory characteristics. The system dynamically adjusts read voltages according to the actual state of memory cells, which change over their lifetime, thereby maintaining optimal read operations without requiring complex external characterization equipment.
Solution Approach 2:
The memory device performs self-characterization and self-adjustment of read voltages. The system uses its own internal resources to monitor memory cell characteristics and automatically select appropriate read voltage levels without external intervention, eliminating the need for separate characterization equipment and reducing overall system complexity.
2Adaptability or versatility
If static voltage tables are used, then the ease of operation is improved, but the adaptability deteriorates because the system cannot adjust to changing memory cell characteristics over time
Solution Approach 1:
The system dynamically adapts read voltage selection to changing memory characteristics by implementing real-time monitoring and adjustment mechanisms. This allows the memory device to automatically respond to degradation and characteristic changes over time, maintaining optimal performance without requiring manual reconfiguration or external characterization.
Solution Approach 2:
The patent implements feedback mechanisms where the system monitors memory cell characteristics during operation and uses this information to adjust read voltage levels. This closed-loop approach enables continuous adaptation to changing memory states, improving both adaptability and operational simplicity by automating the adjustment process.
3Reliability
If read voltage levels are optimized for each memory block, then the reliability is improved, but the device complexity increases due to the need for separate voltage management for each block
Solution Approach 1:
The patent applies local quality by allowing each memory block to have its own optimized read voltage levels tailored to its specific characteristics. This enables precise control and optimization for each block while using a systematic approach that prevents overall system complexity from becoming unmanageable.
Solution Approach 2:
The system segments the voltage management task by block, with each block having independent voltage optimization. This segmentation allows parallel processing and independent characterization of each block, reducing the complexity burden on the central control system while maintaining high reliability through block-specific optimization.
Data Source
AI summary
Device for selecting a level for at least one read voltage for reading data stored in a multi-level memory device. The multi-level memory device includes a plurality of memory blocks, in which each of the memory blocks includes a plurality of word lines, each of the word lines being allocated to a plurality of memory pages and being indexed by a word line index. The device includes a first mapping unit for mapping each of the word line indices to one bin label, in which the number of bin labels is smaller than the number of word lines, and a second mapping unit for mapping each of the bin labels to a voltage information being indicative for at least one read voltage, in which the level for the at least one read voltage for reading data is selectable for each word line based on the respective word line index.