Dynamic Reference Resistance Circuit for Resistive Memory Verification
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Solution Overview
Problem
Resistive memory devices face challenges in accurately verifying whether data has been correctly written, especially when the memory cell is in an abnormal state, as existing verify read operations may not detect miswriting due to intermediate resistance states.
Innovation Solution
Incorporating a reference cell with a reference resistance circuit that adjusts its resistance value based on control signals for read and verify read operations, allowing the sense amplifier to differentiate between correctly and incorrectly written data by sensing voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a verify read operation is performed using a fixed reference resistance circuit, then the operation can be executed, but data miswriting cannot be detected when the memory cell is in an abnormal intermediate state
Solution Approach 1:
The reference resistance circuit dynamically adjusts its resistance value based on the target data being written. The controller selects different reference resistance values corresponding to different data states (e.g., first reference resistance value for first data, second reference resistance value for second data). This dynamic adaptation allows the verify read operation to accurately detect whether the memory cell contains the expected data, even when the memory cell is in an abnormal intermediate state, thereby resolving the contradiction between performing verification and detecting miswriting accurately.
2Device complexity
If the reference resistance circuit uses a single fixed resistance value, then the circuit structure is simple, but it cannot distinguish between different data states and abnormal states
Solution Approach 1:
The reference resistance circuit changes its resistance parameter based on the target data. The controller generates different control signals that adjust the reference resistance circuit's resistance value to match the expected state. This parameter change enables the circuit to distinguish between different data states (first data vs. second data) and detect abnormal states, while maintaining a relatively simple circuit structure that just requires switchable resistance elements controlled by the controller.
3Ease of operation
If the same read voltage is used for both read operations and verify read operations, then the operation flow is simplified, but accurate verification cannot be performed in abnormal states
Solution Approach 1:
The sense amplifier dynamically adjusts the read voltage based on the operation type and target data. For verify read operations, the sense amplifier applies a second read voltage that is different from the first read voltage used in normal read operations. This dynamic voltage adjustment ensures that the verification process can accurately distinguish between correct data states and abnormal intermediate states, while the controller manages the complexity of selecting appropriate voltages based on operation type and target data.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate verification of data writing by distinguishing between correct and incorrect data states, even in abnormal conditions, thereby enhancing the reliability of resistive memory devices.
Implementation Method 1
a sense amplifier configured to sense a difference between a read voltage value applied from the memory cell and a reference voltage value applied from the reference resistance circuit
Implementation Method 2
a reference cell including a reference resistance circuit configured to have different resistance values depending on the control signal
Implementation Method 3
a memory cell including a variable resistance element. When receiving a data write command from a memory controller, the resistive memory device may provide a write current or write voltage to a memory cell. Accordingly, because the resistance value of the variable resistance element included in the memory cell has a value corresponding to data to be written
Data Source
AI summary
A memory device including a memory cell including a variable resistance element, a controller configured to generate a control signal based on whether the memory device performs a read operation or a verify read operation, a reference cell including a reference resistance circuit configured to have different resistance values depending on the control signal, and a sense amplifier configured to sense a difference between a read voltage value applied from the memory cell and a reference voltage value applied from the reference resistance circuit may be provided.