Dynamic-Reference Sense Amplifier for Faster Read-0 Sensing

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Solution Overview

Problem

Conventional single-ended sense amplifiers face challenges in reducing process-voltage-temperature (PVT) dependence and are not suitable for large capacity memory designs due to slow bit line discharging times during read '0' operations, which affects their speed performance.

Innovation Solution

A single-ended differential sense amplifier with a dynamic reference voltage generation circuit that adjusts the reference voltage based on the input data line voltage, allowing the differential sense amplifier to determine the logic state more efficiently by generating a dynamic reference voltage that increases as the input data line voltage decreases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a fixed reference voltage is used in a differential sense amplifier, then the circuit structure is simple, but the sensing speed is slow when the bit line voltage drops slowly

Engineering Contradiction:
Improvesensing speedVSAvoidreference voltage generation circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies the dynamics principle by transforming the fixed reference voltage into a dynamic reference voltage that automatically adjusts according to the bit line voltage. The reference voltage generation circuit uses transistors (MP0, MN0, MN1) to create a reference voltage that dynamically tracks the bit line voltage changes, enabling faster sensing when the bit line voltage drops slowly during read '0' operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by feeding back the bit line voltage (VDL) to the reference voltage generation circuit. This feedback mechanism allows the reference voltage to automatically adjust based on the actual bit line voltage state, ensuring that the voltage difference threshold is reached more quickly and improving sensing speed without requiring complex external control circuits.

Inventive Principle:
Principle #23Feedback

2Area of stationary object

If an inverter type sense amplifier is used, then the circuit area is small, but the bit line discharging time is slow during read '0' operations

Engineering Contradiction:
Improvesense amplifier areaVSAvoidbit line discharging time
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The patent uses the dynamics principle to create a reference voltage that adapts to the bit line voltage changes in real-time. This dynamic adjustment allows the differential sense amplifier to detect voltage changes more rapidly, significantly reducing the bit line discharging time during read '0' operations while maintaining a compact circuit area through efficient transistor utilization.

Inventive Principle:
Principle #15Dynamics

3Speed

If the reference voltage level is adjusted for fast sensing, then the sensing speed improves, but the circuit becomes more complex and occupies greater area

Engineering Contradiction:
Improvesensing speedVSAvoidreference voltage adjustment circuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies the self-service principle by designing a reference voltage generation circuit that automatically adjusts the reference voltage level based on the bit line voltage without requiring external control signals or complex adjustment mechanisms. The circuit uses the inherent properties of transistors MP0, MN0, and MN1 to self-regulate the reference voltage, achieving fast sensing speed while keeping the circuit structure relatively simple and compact.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7768321B2Single-ended sense amplifier using dynamic reference voltage and operation method thereof
Publication Date: 2010.08.03 IND TECH RES INST
  • US7768321B2 patent drawing
  • US7768321B2 patent drawing
  • US7768321B2 patent drawing

AI summary

A single-ended differential sense amplifier comprises a dynamic reference voltage generation circuit and a differential sense amplifier circuit. Input data with an input data line voltage is provided to the differential sense amplifier circuit. The input data line voltage also feeds back to the dynamic reference voltage generation circuit, which then generates a dynamic reference voltage based on the input data line voltage. The differential sense amplifier circuit is coupled to the dynamic reference voltage generation circuit and receives the dynamic reference voltage for determining the input data. The dynamic reference voltage increases and the input data line voltage decreases when reading the input data of a logic state, e.g., logic “0.”