Dynamic Shift Register Circuit for Non-Overlapped Output Signals

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Solution Overview

Problem

Existing vertical shift register circuits for liquid crystal displays require additional logic circuits and level shifters to generate non-overlapped output signals, leading to increased power consumption and production costs due to the need for more transistors.

Innovation Solution

A dynamic shift register circuit comprising a sampling unit, a holding unit, and a first logic circuit that samples incoming signals and generates output signals without the need for additional level shifters, reducing power consumption and transistor count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional logic circuits and level shifters are used to generate non-overlapped output signals, then the output signal quality is improved, but power consumption increases

Engineering Contradiction:
Improveoutput signal qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the level shifting function and logic operation function into a single circuit module. The first logic circuit performs both level shifting from low voltage to high voltage and logical operations simultaneously, eliminating the need for separate level shifter circuits. This integration reduces the number of components and decreases overall power consumption while maintaining reliable non-overlapped output signal generation.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If additional logic circuits and level shifters are used to generate non-overlapped output signals, then the output signal quality is improved, but the number of transistors increases

Engineering Contradiction:
Improveoutput signal qualityVSAvoidnumber of transistors
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates multiple functions into unified circuit modules. The first logic circuit combines level shifting and logic operations, while the second logic circuit similarly combines these functions. This merging approach reduces the total transistor count compared to using separate dedicated level shifters and logic circuits, thereby reducing device complexity while achieving reliable non-overlapped output signals.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The logic circuits in the patent are designed to perform multiple functions: level shifting from low voltage to high voltage, logical operations, and signal generation. This multi-functionality eliminates the need for separate specialized circuits, reducing the overall number of transistors and simplifying the device structure while maintaining signal quality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If additional logic circuits and level shifters are used to generate non-overlapped output signals, then the output signal quality is improved, but production costs increase

Engineering Contradiction:
Improveoutput signal qualityVSAvoidproduction cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By merging level shifting and logic operations into single integrated circuit modules, the patent reduces the total component count. Fewer transistors and circuit elements mean simpler manufacturing processes, lower material costs, and reduced assembly complexity, thereby decreasing production costs while maintaining high output signal quality.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7920668B2Systems for displaying images by utilizing vertical shift register circuit to generate non-overlapped output signals
Publication Date: 2011.04.05 INNOLUX CORP
  • US7920668B2 patent drawing
  • US7920668B2 patent drawing
  • US7920668B2 patent drawing

AI summary

Systems for displaying images are provided. An embodiment of such a system has a dynamic shift register. The dynamic shift register includes a sampling unit, a holding unit, and a first logic circuit. The sampling unit, which is coupled to an incoming signal and a first input terminal of the dynamic shift register, samples the incoming signal according to a first input signal received by the first input terminal to generate a sampled value. The holding unit, which is coupled to the sampling unit, is utilized to hold the sampled value. The first logic circuit, which is coupled to the holding unit and an output terminal of the dynamic shift register, generates an output signal according to the sampled value and a second input signal inputted into the first logic circuit.