Dynamic Source Line Bias Control for Memory Array Sensing Accuracy

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Solution Overview

Problem

Conventional non-volatile memory devices face challenges in achieving high performance and high capacity with reduced power consumption, particularly due to source line bias errors that occur when sensing memory cells in parallel, leading to inaccurate threshold voltage sensing and increased complexity in read/write operations.

Innovation Solution

The implementation of a memory device with a pull-down device and op-amp connected to a common source line, along with a current comparison circuit and variable current source, allows for precise control of the source line bias by referencing the bit line and word line voltages to the same access node as the source line, thereby compensating for source line bias errors and improving sensing accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are sensed in parallel to increase reading speed, then productivity is improved, but source line bias errors increase causing measurement precision to deteriorate

Engineering Contradiction:
Improvereading speedVSAvoidthreshold voltage sensing accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the sensed voltage from the memory cell is fed back to the source line through a transistor. The feedback voltage adjusts the source line bias dynamically during the sensing operation, compensating for the voltage drop caused by parallel sensing currents. This allows multiple cells to be sensed simultaneously while maintaining accurate threshold voltage measurements by continuously correcting the source line potential.

Inventive Principle:
Principle #23Feedback

2Quantity of substance

If more memory cells are connected to common source line to increase capacity, then quantity of substance is improved, but source line bias errors increase causing reliability to deteriorate

Engineering Contradiction:
Improvememory capacityVSAvoidsensing accuracy
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The feedback circuit continuously monitors the source line voltage and adjusts the bias compensation in real-time, ensuring that even with numerous memory cells connected to the common source line, the voltage drop is compensated and sensing accuracy is maintained. This enables high memory capacity while preserving reliable read operations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the source line bias parameter during the sensing operation by introducing a feedback voltage that adjusts the bias level based on the actual voltage drop experienced. This parameter adjustment allows the system to accommodate more memory cells on the common source line while maintaining consistent sensing conditions for reliable operation.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional source line biasing is used to simplify circuit design, then device complexity is reduced, but source line bias errors increase causing measurement precision to deteriorate

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidthreshold voltage sensing accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent adds a feedback path that uses the existing sensed voltage signal to generate a compensation voltage applied to the source line. This feedback mechanism is integrated into the conventional biasing circuitry, adding minimal complexity while significantly improving measurement precision by dynamically correcting source line voltage drops during sensing operations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9177663B2Dynamic regulation of memory array source line
Publication Date: 2015.11.03 SANDISK TECHNOLOGIES LLC
  • US9177663B2 patent drawing
  • US9177663B2 patent drawing
  • US9177663B2 patent drawing

AI summary

To maintain stability of memory array operations, a current source supplies a common source line of a memory. The magnitude of the regulation current from the source is dynamically determined based on the amount of current from the array itself through use of a feedback control signal provided by a current comparator circuit. The current comparison circuit can use either a digital or an analog implementation.