Dynamic Valley Search in Solid State Drives

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Solution Overview

Problem

As solid-state memory devices become more complex, traditional valley scan methods for calibrating threshold voltages become increasingly time-consuming, leading to longer read times and reduced accuracy, especially in multi-level cell memory devices where the number of valleys to be scanned doubles with each added bit, and error correction codes have limitations on error processing.

Innovation Solution

Implementing dynamic valley searches across multiple planes of memory devices, where the task of threshold valley searches is divided and assigned to various memory planes, allowing for reduced scanning time and increased accuracy by pooling calibration data for calibrated reads across all planes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional valley scan methods are used to calibrate threshold voltages in multi-level cell memory devices, then measurement precision is improved, but reading time increases significantly

Engineering Contradiction:
Improvethreshold voltage calibration accuracyVSAvoidreading time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the memory device into multiple independent planes, where each plane performs valley searches independently and simultaneously. This segmentation allows parallel processing of threshold voltage calibration across all planes, reducing total calibration time while maintaining full measurement precision for each plane

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs valley searches in parallel across multiple planes before the actual read operation. By completing the threshold voltage calibration in advance across all planes simultaneously, the system eliminates the sequential time penalty that would otherwise occur during data retrieval

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the number of bits per memory cell is increased to improve storage density, then quantity of substance is improved, but the number of valleys to scan doubles with each added bit, increasing device complexity

Engineering Contradiction:
Improvestorage densityVSAvoidnumber of valleys to scan
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the complex valley search task across multiple planes, where each plane handles a portion of the total valleys independently. This distribution prevents any single processing unit from being overwhelmed by the exponential increase in valleys associated with higher bit-density cells

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds the plane dimension to the valley search process. Instead of scanning all valleys sequentially within a single plane, the system distributes valleys across multiple planes and performs searches in parallel, effectively transforming a one-dimensional sequential problem into a multi-dimensional parallel problem

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of time

If the resolution of valley scan is reduced to decrease scanning time, then loss of time is improved, but measurement precision deteriorates

Engineering Contradiction:
Improvescanning timeVSAvoidvalley scan accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent segments the valley search into parallel operations across multiple planes, allowing each plane to perform full-resolution scans simultaneously. This eliminates the need to reduce resolution as a time-saving measure, since full precision is maintained in each parallel stream

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11727996B2Dynamic valley searching in solid state drives
Publication Date: 2023.08.15 SANDISK TECHNOLOGIES LLC
  • US11727996B2 patent drawing
  • US11727996B2 patent drawing
  • US11727996B2 patent drawing

AI summary

A storage device can reorganize a sequentially performed calibration task and delegate various steps of the task to multiple memory planes. By utilizing a characteristic that provides for similar memory device responses across multiple planes, the calibration task processed on one memory plane can be applied to another memory plane within the device. In this way, partial calibration data may be generated across a plurality of memory planes, and subsequently pooled together to generate a unified calibration data that can be utilized on each of the plurality of planes to do a full calibrated read on memory devices, thus reducing the amount of time needed to perform a calibrated read. Reduced times for calibrated reads allows for increased resolution of threshold valley scans, increased lifespan of the storage device, improved read times, and also provides for data write methods to use less memory during intermediate multi-pass programming steps.