Dynamic Via Radius Adjustment for Multi-Layer PCB Layout Efficiency

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Solution Overview

Problem

Conventional PCB CAD software programs restrict efficient PCB layout by assuming all vias have pads on intermediate layers, prohibiting designers from utilizing unused space due to static via definitions, which limits trace placement and increases the number of layers required.

Innovation Solution

Implementing dynamic vias in PCB CAD software that adjust their radius based on trace connections, allowing for more flexible trace routing on intermediate layers by changing from a smaller radius (R2) to a larger radius (R1) when connected to a trace, thereby optimizing layout space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single static via definition is used for all vias in PCB design, then the design process is simplified and consistent, but the layout efficiency is reduced and unused space cannot be utilized

Engineering Contradiction:
Improvevia definition complexityVSAvoidlayout efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies the dynamics principle by making via definitions dynamic rather than static. Each via's definition changes based on whether it is connected to a trace: unconnected vias have a first definition with no intermediate layer pads, while connected vias have a second definition with intermediate layer pads. This dynamic adjustment allows the PCB layout tool to optimize space utilization during the design process while maintaining manufacturing consistency through the use of a single via location definition.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by modifying via definition parameters (specifically the presence or absence of intermediate layer pads) based on connection status. The system changes the geometric and structural parameters of via definitions dynamically during layout, allowing unconnected vias to have smaller effective footprints while connected vias maintain their full pad structures, thereby optimizing layout density without compromising electrical connectivity.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If all vias are assumed to have pads on intermediate layers during design, then design rule verification is simplified, but the available layout area is reduced and more layers are required

Engineering Contradiction:
Improvedesign rule verification complexityVSAvoidavailable layout area
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by differentiating via properties based on their specific function in the layout. Unconnected vias are treated with a first definition that excludes intermediate layer pads, maximizing local space utilization. Connected vias are treated with a second definition that includes intermediate layer pads to ensure proper electrical connectivity. This localized differentiation allows the design to optimize space in regions where vias are not connected, while maintaining proper pad structures where connections are required.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically adjusts via definitions during the layout process based on connection detection. As traces are routed and connected to vias, the via definitions transition from the first definition (no intermediate pads) to the second definition (with intermediate pads). This dynamic adjustment allows the layout tool to maximize available layout area during the design phase while ensuring that final manufactured vias have the correct pad structures for electrical connectivity.

Inventive Principle:
Principle #15Dynamics

3Reliability

If intermediate pads are removed after PCB design, then manufacturing cost is reduced and reliability is increased, but the layout cannot utilize the additional space that would be available

Engineering Contradiction:
ImprovePCB reliabilityVSAvoidlayout efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements preliminary action by performing pad removal during the design phase rather than as a post-processing step. The layout tool proactively identifies unconnected vias and applies the first via definition (without intermediate layer pads) before the design is finalized. This preliminary action allows the layout to be optimized for space utilization from the beginning, while ensuring that only unconnected vias have pads removed, maintaining reliability by preserving pads on connected vias.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system employs self-service by automatically detecting which vias are connected to traces and automatically applying the appropriate via definition. The PCB layout tool scans the design, identifies unconnected vias, and removes intermediate layer pads from those specific vias without requiring manual intervention. This self-service approach ensures that pad removal is performed correctly and consistently, improving both reliability and layout efficiency.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7996806B2Methods and apparatus for layout of multi-layer circuit substrates
Publication Date: 2011.08.09 FIERY LLC
  • US7996806B2 patent drawing
  • US7996806B2 patent drawing
  • US7996806B2 patent drawing

AI summary

Methods and apparatus are provided for designing and laying out multi-layer circuit substrates, such as multi-layer PCBs. Dynamic vias are provided on intermediate PCB layers. Each dynamic via has features that adjust based on the trace layout of the corresponding intermediate layer. In particular, each dynamic via has a second radius R2 if the via is not connected to any trace on the corresponding intermediate layer. If a trace is connected to a dynamic via, the via radius changes from the second radius R2 to a first radius R1, where R1 is greater than R2.