Dynamic Voltage Scaling for Memory Error Rate Control
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Solution Overview
Problem
Existing memory sub-systems face challenges in efficiently managing voltage to balance power consumption and error rates, particularly as error rates fluctuate due to factors like temperature and workload.
Innovation Solution
The implementation of voltage scaling based on error rate, where parity mismatch values are used to determine the actual bit-error-rate of memory devices and channels, allowing for dynamic adjustment of voltage to maintain an acceptable total error rate while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage is increased to reduce error rates, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic voltage scaling by continuously monitoring error rates and adjusting voltage levels in real-time. The system transitions from static voltage operation to dynamic adjustment, scaling voltage up when error rates increase and scaling down when error rates are acceptable, thereby resolving the contradiction between maintaining reliability and reducing power consumption.
Solution Approach 2:
The system changes the voltage parameter based on monitored error rate conditions. By detecting parity mismatches and calculating error rates, the system adjusts voltage levels to match actual system needs, avoiding unnecessary high voltage operation and reducing overall power consumption while maintaining acceptable error rates.
2Loss of energy
If voltage is scaled down to reduce power consumption, then energy efficiency is improved, but error rates increase
Solution Approach 1:
The patent employs feedback mechanisms where error rates are continuously monitored through parity mismatch detection. This feedback information drives voltage scaling decisions, ensuring that voltage is reduced only when error rates remain within acceptable thresholds, thus preventing reliability degradation while achieving energy savings.
Solution Approach 2:
The system performs self-adjustment by autonomously monitoring its own error rates and making voltage scaling decisions without external intervention. The memory sub-system controller detects parity mismatches, calculates error rates, and autonomously adjusts voltage levels, enabling the system to serve its own voltage control needs efficiently.
3Loss of energy
If dynamic voltage adjustment is implemented to reduce power consumption, then energy efficiency is improved, but system complexity increases
Solution Approach 1:
The patent integrates voltage scaling functionality into the existing memory sub-system controller, which already performs error detection and correction functions. By reusing existing hardware resources for multiple purposes (error detection, error rate calculation, and voltage control decisions), the system achieves dynamic voltage adjustment without proportionally increasing overall system complexity.
Data Source
AI summary
A method includes generating, by circuitry resident on a memory device, parity information, appending parity information to data read from the memory device to generate a bit string comprising the data read from the memory device and parity information, transmitting the bit string from the memory device to a physical input/output (PHY I/O) device couplable to the memory device via a channel, calculating a parity mismatch value based on a comparison between received memory parity information and a calculated PHY I/O parity information, determining a target parity mismatch value, comparing the calculated parity mismatch value and the determined target parity mismatch value, and regulating a voltage in response to the comparison between the calculated parity mismatch value and the target parity mismatch value to maintain an actual channel error rate within an optimal range.