E-Beam Fin Overlay Correction for Precise Layer Alignment
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Solution Overview
Problem
Electron beam lithography faces challenges in achieving precise overlay alignment due to positional errors between alignment mark and device pattern layers, leading to variations in chip-to-chip and wafer-to-wafer overlay errors, which compromise pattern exposure accuracy and yield.
Innovation Solution
An electron beam lithography method that includes executing a predefined scan over the pattern edge, generating signals from reflections, determining and applying offsets to achieve accurate alignment measurements, enabling dynamic fin overlay correction and addressing positional errors on a chip and sub-chip scale.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional electron beam lithography alignment methods are used, then the alignment process is simple, but overlay precision deteriorates due to positional errors between alignment mark and device pattern layers
Solution Approach 1:
The patent replaces conventional optical alignment mark detection with electron beam-based direct measurement of device pattern positions. The Ebeam scanner measures actual device pattern locations and compares them against alignment marks, substituting mechanical/optical alignment systems with electron beam metrology to achieve superior overlay precision of less than 20 nm.
Solution Approach 2:
The patent introduces an intermediary measurement and calculation system that bridges alignment marks and device patterns. The Ebeam scanner acts as an intermediary tool that measures both alignment marks and device patterns, then calculates positional offsets through coordinate transformation and comparison, enabling precise overlay correction without direct mechanical contact.
2Manufacturing precision
If dynamic fin overlay correction is implemented, then overlay precision improves, but processing time increases due to additional measurement and correction steps
Solution Approach 1:
The patent performs preliminary measurement of device pattern positions and alignment mark positions before the actual lithography exposure. By measuring all necessary positions in advance and calculating offset corrections beforehand, the system prepares correction data that can be applied during exposure without adding significant time to the critical path of the lithography process.
Solution Approach 2:
The patent implements dynamic overlay correction where the Ebeam scanner continuously measures device pattern positions and calculates real-time offset corrections during the lithography process. The system dynamically adjusts alignment parameters based on measured positions, enabling adaptive correction that maintains precision while optimizing processing throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method achieves 100% device yield and increases throughput by over 70% by accurately measuring and correcting for position errors in real-time, reducing wafer rework and enhancing overlay precision.
Implementation Method 1
generating a signal from reflections of the Ebeam scan off the pattern edge
Data Source
AI summary
An electron beam lithography (Ebeam) method for a wafer having alignment and device layers with a design alignment. The Ebeam method includes executing an Ebeam scan of predefined length and resolution based on the design alignment over a pattern edge of the device layer, generating a signal from reflections of the Ebeam scan off the pattern edge, determining an offset of the device layer relative to the alignment layer from a comparison of the signal and the design alignment and applying the offset to the design alignment to obtain an actual measurement of Ebeam alignment.