Embedded Controller Memory Region Selection for BIOS Loading

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Solution Overview

Problem

Current pre-boot environments in information handling systems face challenges in memory error handling due to severe constraints in early memory reference code execution, leading to no-POST system hangs when bad memory modules are encountered, making it difficult to optimize memory initialization and avoid training on faulty regions.

Innovation Solution

An information handling system with an embedded controller (EC) that executes memory reference code to test selected memory regions, stores likelihoods of memory region failures, and upon boot, selects a region with a low likelihood of being bad for loading the BIOS, thereby avoiding bad memory regions and improving memory error handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory reference code tests all memory regions during pre-boot initialization, then memory reliability is improved, but system boot time increases and system hangs may occur on bad memory modules

Engineering Contradiction:
Improvememory reliabilityVSAvoidsystem boot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs memory region testing and stores results in EC memory during the first pre-boot initialization. This preliminary action allows subsequent boots to skip testing of known-good regions, reducing boot time while maintaining reliability through prior verification of memory regions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the memory testing and result storage function from the main pre-boot initialization process and places it in the embedded controller's non-volatile memory. This separation allows the main system to boot faster by relying on pre-stored memory status information while the EC maintains the historical data.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If memory reference code trains on all memory modules during initialization, then memory initialization completeness is improved, but system hangs occur when encountering bad memory modules

Engineering Contradiction:
Improvememory initialization completenessVSAvoidsystem stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The system performs preliminary memory region testing and stores results in the EC before normal operation. This preliminary anti-action prevents the system from attempting to initialize known-bad memory regions, avoiding system hangs while ensuring complete initialization of only good regions.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The embedded controller acts as an intermediary that stores memory region status information in its non-volatile memory. This intermediary allows the main system to make informed decisions about which memory regions to initialize, preventing direct encounters with bad memory modules that would cause system hangs.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If the system loads BIOS into fixed memory regions, then BIOS loading simplicity is improved, but system hangs occur when fixed regions are bad

Engineering Contradiction:
ImproveBIOS loading simplicityVSAvoidboot reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The system dynamically selects BIOS loading memory regions based on pre-stored status information in the EC. Instead of using fixed memory regions, the system can adaptively choose from multiple regions, maintaining operational simplicity while improving boot reliability by avoiding known-bad regions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20220350705A1Linking embedded controller with memory reference code and system BIOS shadowing
Publication Date: 2022.11.03 DELL PROD LP
  • US20220350705A1 patent drawing
  • US20220350705A1 patent drawing
  • US20220350705A1 patent drawing

AI summary

An information handling system may include at least one processor, a memory, and an embedded controller (EC). The information handling system may be configured to, prior to initialization of an operating system of the information handling system: execute memory reference code configured to test selected regions of the memory; transmit results of the memory reference code to the EC; store, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad; and upon a subsequent boot, select a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.