ECC H-Matrix Grouping for Multi-Bit Memory Error Correction
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Solution Overview
Problem
As memory device capacity increases, producing memory devices with no defective memory cells becomes increasingly difficult, and existing error correction methods struggle to efficiently correct multi-bit errors in memory systems.
Innovation Solution
The integration of an ECC encoder and decoder circuit using an H matrix divided into groups, where group matrices circulate and shift positions during each round, enabling effective detection and correction of multi-bit errors in memory systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory device capacity is increased, then storage capability is improved, but the probability of defective memory cells increases
Solution Approach 1:
The H matrix data portion is divided into multiple groups (first group, second group, third group, etc.), with each group processed by dedicated group matrices. This segmentation allows the ECC circuit to handle large capacity memory by breaking down the error correction task into manageable segments, thereby maintaining reliability in high-capacity devices.
2Reliability
If conventional ECC methods are used, then single-bit errors are corrected, but multi-bit errors cause miscorrection
Solution Approach 1:
The data portion of the H matrix is divided into multiple groups, and different group matrices are applied to different groups. This segmentation enables the system to distinguish between multi-bit errors within the same group and errors in different groups, preventing miscorrection of multi-bit errors while maintaining the ability to correct single-bit errors.
Solution Approach 2:
The patent employs dynamic selection and circulation of group matrices based on the syndrome results. When a multi-bit error is detected in one group, the system dynamically switches to handling other groups, adapting the error correction process to the actual error pattern, thereby avoiding miscorrection.
3Reliability
If H matrix size is increased to correct more errors, then error correction capability is improved, but circuit complexity increases
Solution Approach 1:
Instead of using a single large H matrix that would require complex circuitry, the patent segments the H matrix into multiple smaller groups with dedicated group matrices. This segmentation reduces the complexity of individual matrix operations while maintaining the overall error correction capability through coordinated processing of multiple groups.
Solution Approach 2:
The patent applies group matrices selectively to different data groups based on error detection needs. Not all group matrices are applied to all data simultaneously, but rather partial application based on syndrome analysis, reducing the overall computational complexity while achieving multi-bit error correction.
Data Source
AI summary
An integrated circuit includes an ECC encoder circuit configured to operate an H matrix on transmission data, to generate a transmission parity to be transmitted together with the transmission data, the transmission parity corresponding to the transmission data; and an ECC decoder circuit configured to operate the H matrix on reception data and a reception parity to detect and correct an error in the reception data. A data portion of the H matrix is divided into N groups, and each of the N groups includes a group matrix portion for distinguishing groups and a non-group matrix portion for distinguishing bits within a corresponding group. The group matrix portion is used by k group matrices that circulate in the N groups, and each time the k group matrices circulate one round, positions of the k group matrices inserted in groups are shifted.