In-Memory ECC Logic for Cross-Point Memory Compute

Solution Overview

Problem

Existing memory and storage devices face inefficiencies due to the overhead of error correction processes, which consume energy and time when data is sent between memory media and the memory controller for error correction, especially in architectures where computations are performed in-memory.

Innovation Solution

Implementing a compute-class ECC logic unit within the media access circuitry, local to the memory media, to perform error correction on smaller data sets and execute faster algorithms, eliminating the need for data to be sent to the memory controller, thereby enabling efficient in-memory computations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction is performed by the memory controller on data sent from memory media, then error correction reliability is ensured, but energy consumption increases and processing time is extended due to data transmission through the bus

Engineering Contradiction:

Improveerror correction reliabilityVSAvoidenergy consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the error correction function into two parts: a first ECC logic unit in the memory controller for comprehensive error correction, and a second ECC logic unit in the media access circuitry for preliminary error correction on smaller data sets. This segmentation allows the majority of error correction to be performed locally in memory, reducing data transmission and energy consumption while maintaining overall reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The second ECC logic unit in the media access circuitry performs preliminary error correction on data before it is sent to the memory controller. By correcting errors early in the data path on smaller data sets, the system reduces the likelihood that corrected data needs to be transmitted through the bus, thereby reducing energy consumption and processing time while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If error correction is performed by the memory controller on data sent from memory media, then error correction reliability is ensured, but processing time is extended due to data transmission through the bus

Engineering Contradiction:

Improveerror correction reliabilityVSAvoidprocessing time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the error correction function into two parts: a first ECC logic unit in the memory controller for comprehensive error correction, and a second ECC logic unit in the media access circuitry for preliminary error correction on smaller data sets. This segmentation allows the majority of error correction to be performed locally in memory, reducing data transmission and processing time while maintaining overall reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The second ECC logic unit in the media access circuitry performs preliminary error correction on data before it is sent to the memory controller. By correcting errors early in the data path on smaller data sets, the system reduces the likelihood that corrected data needs to be transmitted through the bus, thereby reducing energy consumption and processing time while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If data is sent from memory media to the memory controller for error correction, then error correction can be performed, but efficiency of in-memory computations is diminished due to bus usage

Engineering Contradiction:

Improvedata integrityVSAvoidin-memory compute efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent segments the error correction function into two parts: a first ECC logic unit in the memory controller for comprehensive error correction, and a second ECC logic unit in the media access circuitry for preliminary error correction on smaller data sets. This segmentation allows the majority of error correction to be performed locally in memory, reducing data transmission and energy consumption while maintaining overall reliability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The media access circuitry is equipped with a second ECC logic unit that enables it to perform preliminary error correction independently without requiring data transmission to the memory controller. This self-service capability allows in-memory computations to proceed efficiently with minimal bus usage while still ensuring data integrity through local error correction.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11237903B2Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations

Publication Date: 2022.02.01 INTEL CORP

AI summary

Technologies for provisioning error-corrected data for use in in-memory compute operations include a memory that includes a memory media having multiple memory partitions and media access circuitry coupled to the memory media. The media access circuitry is to receive a request to perform an in-memory compute operation on data from the memory media. The request specifies a memory partition of the memory media in which the data is located. The media access circuitry reads the data from the memory partition. The media access circuitry performs error correction on the read data to produce error-corrected read data and stores the error-corrected read data in a temporary buffer for access by one or more in-memory compute operations, in addition to the requested in-memory compute operation.