Onboard ECU Memory Check Threshold Reset Prevention

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Solution Overview

Problem

In onboard electronic control units (ECUs), repeated resets due to memory abnormalities lead to wasteful electric power consumption, especially when the vehicle engine is stopped, causing battery drain and preventing normal ECU software execution.

Innovation Solution

An ECU configuration that includes a memory, CPU, abnormality frequency storage unit, abnormality frequency update unit, abnormality determination unit, and abnormality handling unit, which stores and updates abnormality counts and executes error handling processing when the count exceeds a threshold, preventing further resets during this process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU performs memory check and reset when memory abnormality is detected, then memory reliability is improved, but electric power consumption increases due to repeated resets

Engineering Contradiction:
Improvememory reliabilityVSAvoidelectric power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system implements a feedback mechanism by counting the number of memory check failures and comparing it against a threshold value. When the abnormality count reaches the threshold, the system transitions from active reset to error handling mode, thereby reducing repeated resets and power consumption while maintaining reliability through monitored error accumulation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts its response to memory abnormalities based on the accumulated error count. Initially, the system performs resets upon detecting memory errors, but when the abnormality count reaches the threshold, it transitions to executing error handling programs without further resets, thus adapting its behavior to balance reliability and power consumption.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the CPU repeatedly resets when memory abnormality is detected, then memory errors are addressed, but normal ECU software execution is prevented

Engineering Contradiction:
Improvememory error handlingVSAvoidECU software execution
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically changes its operational state based on the memory abnormality count. When the count is below the threshold, the system maintains normal ECU software execution with periodic memory checks. When the threshold is reached, it transitions to error handling mode, preventing further resets and ensuring continuous operation with appropriate error management.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs preliminary counting of memory check failures before taking drastic action. By accumulating error counts and comparing against a threshold, the system prepares for a state transition before actually switching to error handling mode, ensuring that normal operation continues as long as errors remain within acceptable limits.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by moving object

If the CPU executes error handling processing program, then power consumption is reduced, but memory check and reset functionality is restricted

Engineering Contradiction:
Improveelectric power consumptionVSAvoidmemory check capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system applies partial action by restricting memory check and reset operations only when necessary (when abnormality count reaches threshold). Instead of continuously performing memory checks and resets, the system executes error handling programs that provide sufficient error management while consuming less power, accepting limited memory check capability as a trade-off for reduced power consumption.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9778970B2Memory check, abnormality threshold count, and reset in an onboard electronic control unit
Publication Date: 2017.10.03 DENSO CORP
  • US9778970B2 patent drawing
  • US9778970B2 patent drawing
  • US9778970B2 patent drawing

AI summary

Provided is an onboard electronic control unit. A CPU regularly performs a memory check and, if a determination has been made that there is an error in the memory content, writes the number of times an error has been determined to an error count storage unit, and resets itself. Immediately after the CPU has been reset and before the first memory check is performed, an error determination unit determines whether or not the error count stored in the error count storage unit is at least an error determination threshold. If the error count is at least the error determination threshold, an error response unit causes the CPU to execute a specific error response program, out of the programs in the memory.