Incremental EDA Coverage Log Merging for Storage Reduction
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Solution Overview
Problem
Current electronic design automation (EDA) methods are inefficient in verifying hardware description language (HDL) circuit designs due to limited capabilities of static methods and incomplete verification by dynamic simulations, leading to excessive resource usage and storage requirements for coverage logs.
Innovation Solution
The method involves merging coverage logs generated during simulations, allowing for early aggregation and analysis of coverage data, even before all simulations are completed, which reduces storage needs and identifies coverage holes promptly, and determines when further simulations would not improve verification coverage, thereby optimizing resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If coverage logs are merged only after all simulations complete, then complete verification coverage is achieved, but storage requirements and processing time increase significantly
Solution Approach 1:
The patent implements preliminary merging of coverage logs as simulations complete, rather than waiting for all simulations to finish. The system merges coverage logs incrementally when they become available, allowing early identification of coverage holes and reducing storage requirements by processing data before the entire simulation suite completes.
2Reliability
If all simulations are completed before merging coverage logs, then comprehensive coverage data is available, but resource utilization efficiency decreases
Solution Approach 1:
The system implements feedback mechanisms where merged coverage logs are analyzed to identify coverage holes, which then feed back into directing subsequent simulations. This allows the verification process to be optimized in real-time, improving productivity by focusing computational resources on areas that need additional coverage rather than uniformly completing all predetermined simulations.
Solution Approach 2:
The patent performs preliminary merging and analysis of coverage logs as they become available during the simulation process. This preliminary action enables early detection of sufficient coverage areas, allowing the system to potentially stop or redirect simulations before all predetermined simulations complete, thereby improving overall verification efficiency.
3Quantity of substance
If coverage logs are merged incrementally during simulations, then storage requirements are reduced, but the complexity of managing ongoing merges increases
Solution Approach 1:
The patent segments the coverage log merging process into manageable tasks that can be performed incrementally as simulations complete. The system divides the overall merging operation into individual log merge operations, each handling specific coverage logs when they become available, rather than attempting to manage all logs simultaneously. This segmentation reduces the immediate complexity of merge management while maintaining the ability to achieve comprehensive coverage.
Data Source
AI summary
An electronic design automation technology merges coverage logs. The coverage logs are generated by verification of a hardware description language circuit design. The coverage logs are merged as the coverage logs are generated, without waiting for all pending coverage logs. Another electronic design automation technology also merges coverage logs. The merged coverage logs include a first coverage log of a first simulation of a hardware description language circuit design and a second coverage log of a second simulation of the hardware description language circuit design. The first simulation is based on a first hardware verification language coverage model of the hardware description language circuit design. The second simulation is based on a second hardware verification language coverage model of the hardware description language circuit design. The second hardware verification language coverage model is newer and different than the first hardware verification language coverage model.