EDA System Automatic Timing Skew Removal
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Solution Overview
Problem
Conventional IC design flows are complex, costly, and inefficient due to manual adjustments for worst-case timing skew analysis between clock sources in integrated circuits, leading to nonoptimal power and area results.
Innovation Solution
A computer-implemented method that partitions the initial circuit design into sub-design blocks with local clock sources based on a global clock source, performs timing analysis to estimate skew, and automatically modifies the design to remove timing skew, using a static timing analysis module and clock skew removal circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual adjustments are used for worst-case timing skew analysis, then timing accuracy is improved, but design complexity and cost increase
Solution Approach 1:
The system performs self-adjustment by automatically detecting timing skew through static timing analysis and inserting delay elements without requiring manual intervention. The EDA tool autonomously analyzes the circuit design, identifies skew conditions, and applies corrections through automated placement of delay elements in the timing paths.
Solution Approach 2:
The patent replaces manual mechanical adjustment processes with automated computational methods. Instead of manual timing adjustments, the system uses computer-based static timing analysis to detect skew and automatically generates corrections through software tools that process circuit designs and apply fixes algorithmically.
2Measurement precision
If manual adjustments are used for timing skew analysis, then timing accuracy is improved, but time consumption increases
Solution Approach 1:
The system performs preliminary timing analysis during the design phase using static timing analysis tools to identify potential skew issues before finalization. By conducting timing skew detection and delay element insertion during the design process rather than during testing or manufacturing, the system eliminates time-consuming post-production adjustments.
Solution Approach 2:
Manual time-consuming adjustment processes are replaced with automated computational timing analysis that quickly processes circuit designs and generates corrections through software algorithms, significantly reducing the time required for timing skew management.
3Reliability
If conventional design flows are used, then design reliability is maintained, but productivity decreases
Solution Approach 1:
The automated system performs self-adjustment by detecting timing skew through static timing analysis and automatically inserting delay elements without requiring manual intervention, thereby maintaining design reliability while significantly improving productivity through automation.
Solution Approach 2:
The system changes the approach from manual worst-case analysis to automated static timing analysis with automatic delay element insertion. This parameter change in the design flow methodology maintains reliability by ensuring timing accuracy while improving productivity through automated processing.
Data Source
AI summary
A computer-implemented method for manufacturing an integrated circuit chip is disclosed. The method includes selecting cell-based circuit representations to define an initial circuit design. The initial circuit design is partitioned into multiple sub-design blocks to define a partitioned design. Circuit representations of local clock sources are inserted into the partitioned design. Each local clock source is for clocking a respective sub-design block and based on a global clock source. A timing analysis is performed to estimate skew between each local clock source and the global clock source. The partitioned design is automatically modified based on the estimated skew.