Edge-Compensating Balancing Circuit for ISI Bandwidth Loss

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Solution Overview

Problem

Existing equalizers cannot effectively compensate for bandwidth attenuation caused by inter-symbol interference (ISI) and fail to separately adjust rising and falling edges of signals, leading to significant high-frequency component loss and distortion during signal transmission.

Innovation Solution

A balancing circuit comprising amplifying circuits and edge detection circuits that utilize time-delay units, NOT gates, AND gates, and path selection switches to detect rising and falling edges, allowing for separate adjustment of signal phases and compensation for high-frequency attenuation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If a conventional equalizer superimposes delayed and inverted signals to increase high-frequency gain, then the signal bandwidth is widened, but it cannot compensate for the loss of high-frequency components due to inter-symbol interference (ISI)

Engineering Contradiction:
Improvesignal bandwidthVSAvoidhigh-frequency component loss due to ISI
Core Design Contradiction:
Length of moving objectVSLoss of information

Solution Approach 1:

The patent segments the equalization process into three separate amplifying circuits (first, second, and third amplifying circuits) that independently process different signal components. The first amplifying circuit processes the original input signal, the second amplifying circuit processes the falling edge detected signal, and the third amplifying circuit processes the rising edge detected signal. This segmentation allows each circuit to be optimized for specific signal characteristics and enables separate compensation for rising and falling edges, thereby effectively compensating for ISI-induced high-frequency loss while maintaining broadband performance.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a conventional equalizer compensates for rising and falling edges simultaneously, then the circuit structure is simplified, but it cannot separately compensate for the different attenuations of high-frequency components in different bits

Engineering Contradiction:
Improveequalizer circuit structureVSAvoidcompensation precision for different bit edges
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent divides the equalization function into separate rising edge detection circuit, falling edge detection circuit, and three amplifying circuits. Each detection circuit independently identifies its respective edge type, and each amplifying circuit independently compensates for that edge type. This segmentation enables precise separate compensation for rising and falling edges despite increased circuit complexity, directly resolving the contradiction between structural simplicity and compensation precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by providing different compensation characteristics for different signal edges. The second amplifying circuit is specifically configured to compensate falling edges detected by the falling edge detection circuit, while the third amplifying circuit is specifically configured to compensate rising edges detected by the rising edge detection circuit. Each amplifying circuit can be independently optimized for its specific edge type, achieving locally optimized compensation precision for different bit transitions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11146426B2Balancing circuit capable of compensating bandwidth attenuation introduced by interference between signals
Publication Date: 2021.10.12 XIAMEN UX IC CO LTD
  • US11146426B2 patent drawing
  • US11146426B2 patent drawing
  • US11146426B2 patent drawing

AI summary

A balancing circuit which may compensate for bandwidth attenuation introduced by interference between signals includes an amplifying circuit, a rising edge detection circuit and/or a falling edge detection circuit. By means of detecting the rising/falling edge of an original signal, the resulting pulse signal contains the phase information of a single “0” bit and a single “1” bit in the original signal, thus the phase of a rising edge or the phase of a falling edge of the original signal may be compensated respectively, so as to compensate for the high-frequency attenuation caused by interference between signals.