Edge-Emitting LED Array Stacking for Fine-Pitch Light Output
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Solution Overview
Problem
Conventional LED devices face challenges in producing high-quality light with desired emission characteristics while maintaining high light emission efficiency, particularly in close-proximity arrangements where electrical connections and thermal management become complex.
Innovation Solution
The development of edge-emitting semiconductor devices with electrical connections along device edges, allowing for vertically arranged LED chips to form arrays with reduced pitch, utilizing bonding and separation techniques to create individual or grouped edge emitters, and incorporating lumiphoric materials for enhanced light emission and color quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If LED chips are arranged in close proximity on a common submount, then space utilization is improved, but electrical connection complexity increases
Solution Approach 1:
The patent transitions from planar arrangement of LED chips to a three-dimensional vertical stacking configuration. Multiple LED chips are stacked vertically with electrical connections made through the vertical dimension using conductive vias and contact pads on opposing faces, thereby achieving high density without increasing lateral electrical connection complexity
Solution Approach 2:
The patent combines multiple LED chips into a single integrated three-dimensional package structure. The chips are electrically and mechanically coupled together, sharing common electrical interconnection structures and mounting substrate, which reduces overall system complexity compared to separate discrete connections
2Ease of manufacture
If conventional LED structures are used, then manufacturing simplicity is maintained, but light emission efficiency decreases
Solution Approach 1:
The active layer is reconfigured from a planar two-dimensional structure to a three-dimensional vertical structure extending between opposing faces of the device. This vertical configuration increases the effective light-emitting volume and improves extraction efficiency while maintaining compatibility with standard vertical growth semiconductor manufacturing processes
Solution Approach 2:
The patent employs composite semiconductor structures with multiple layers including n-type and p-type regions, active layers, and contact layers with different material compositions optimized for carrier injection, recombination, and electrical contact, thereby improving light emission efficiency through tailored material properties
3Device complexity
If electrical connections are made on the same face as light emission, then device structure is simplified, but light emission quality deteriorates
Solution Approach 1:
The patent creates an asymmetric device structure where electrical connections (contact pads) are positioned on one face while the light-emitting active layer extends to the opposite face. This spatial separation ensures that electrical contacts do not obstruct or degrade the quality of emitted light while maintaining a relatively simple overall device architecture
Solution Approach 2:
The patent separates electrical connection functions and light emission functions into different spatial dimensions and locations. Electrical connections are made through vertical vias and contact pads on opposing faces, while the active layer extends vertically to provide light emission from the far face, achieving functional separation without significantly increasing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the creation of LED arrays with fine pitch capabilities, improving light emission efficiency and color quality, suitable for high-resolution displays and applications requiring precise light management.
Implementation Method 1
When a bias is applied across the doped layers, holes and electrons are injected into the one or more active layers where they recombine to generate emissions such as visible light or ultraviolet emissions
Implementation Method 2
The LED chip may further comprise a lumiphoric material on the first face of the encapsulation layer, the lumiphoric material being registered with the second edge of at least one LED chip of the plurality of LED chips
Data Source
AI summary
Semiconductor devices and more particularly edge-emitting semiconductor devices and related methods are disclosed. Exemplary edge-emitting semiconductor devices include LED edge emitters. Electrical connections for edge-emitting devices may be provided along certain device edges with opposing edges forming light-emitting edges. LED edge emitters may be vertically arranged and assembled together to form LED arrays with reduced pitch. Related methods include bonding multiple wafer-level structures, such as LED wafers, together, followed by separation techniques that result in individual edge emitters or groupings of edge emitters in the form of LED arrays.