Edge Word Line Proactive Refresh for Semi-Circle Drain Side Select Gate
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Solution Overview
Problem
Semi-circle drain side select gate (SC-SGD) memory technology faces inefficiencies due to etching variations, leading to parasitic transistor leakage and data retention issues, as the cutting process can remove shielding layers and affect neighboring electric fields, causing incorrect sensing and charge loss.
Innovation Solution
A memory apparatus and method that identifies and periodically applies a program voltage to the edge word line without erasing memory cells, reprogramming them to maintain data retention and reduce the impact of etching variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If etching technology is used to create semi-circular memory holes, then die size is reduced, but shielding layers are removed causing parasitic transistor leakage
Solution Approach 1:
The patent applies preliminary anti-action by proactively refreshing the edge word line before parasitic leakage can cause sensing errors or data loss. The control circuit periodically applies a refresh voltage to the edge word line to preemptively counteract the cumulative effect of parasitic transistor leakage, thereby maintaining reliable operation despite the structural modification that caused the leakage in the first place
2Productivity
If etching cuts memory holes to semi-circular shape, then manufacturing efficiency is improved, but data retention is adversely affected due to charge loss
Solution Approach 1:
The patent implements preliminary action by periodically refreshing the edge word line with a program voltage to restore charge before data retention is critically compromised. This proactive approach maintains data integrity in memory holes with semi-circular drain side select gates that are prone to charge loss due to etching variations, without requiring redesign of the etching process itself
3Reliability
If edge word line is refreshed by applying program voltage, then data retention is improved, but additional operations are required
Solution Approach 1:
The patent applies local quality by targeting only the edge word line for refreshing operations, rather than refreshing all word lines in the memory array. The control circuit identifies and applies refresh voltage specifically to the edge word line that is susceptible to parasitic leakage and charge loss, thereby improving data retention with minimal additional operational complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves data retention by reprogramming edge word lines without erasing associated memory cells, reducing the need for additional dummy word lines and minimizing process costs, while maintaining reliable data storage.
Implementation Method 1
periodically apply a program voltage to the at least one edge word line to reprogram the memory cells associated with the at least one edge word line
Data Source
AI summary
A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to one of a plurality of word lines including at least one edge word line and a plurality of other data word lines. The memory cells are arranged in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. The memory apparatus also includes a control means coupled to the plurality of word lines and the strings. The control means is configured to identify the at least one edge word line. The control means is also configured to periodically apply a program voltage to the at least one edge word line to reprogram the memory cells associated with the at least one edge word line without erasing the memory cells associated with the at least one edge word line.