eDRAM Reference Voltage Regulator Using Periodic Sampling
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Solution Overview
Problem
Existing methods for generating a reference voltage level for embedded dynamic random access memory (eDRAM) using VSS-sensing are inefficient, requiring large reservoir capacitors for analog regulators and additional area for reference cells, leading to high power consumption and instability near VSS levels.
Innovation Solution
A 'sample-and-correct' type of voltage generator is employed, using a temperature-controlled oscillator and differential amplifier to adjust the reference voltage with a reservoir capacitor, allowing for precise control and minimal ripple, and enabling operation at lower VDD values with increased current through sense amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If an analog regulator is used to generate reference voltage, then the area for the generator is small, but large voltage regulation requires a large reservoir capacitor which increases power consumption
Solution Approach 1:
The patent implements a periodic sampling and correction mechanism where the reference voltage is sampled at specific intervals and corrected only when necessary. The control block receives sampling requests and generates correction pulses periodically rather than continuously, reducing power consumption while maintaining voltage accuracy. This is evident in the clock signal generation and periodic sampling/correction operation described in the patent.
Solution Approach 2:
The patent employs a feedback mechanism where the reference voltage is continuously monitored and compared against a target level. The control block receives feedback about voltage deviations and generates correction pulses only when the reference voltage falls outside acceptable thresholds. This feedback-driven approach minimizes unnecessary corrections and reduces power consumption while maintaining precision.
2Stability of the object's composition
If the response of the analog regulator is improved to minimize ripple, then standby current must be increased
Solution Approach 1:
Instead of continuously adjusting the reference voltage to minimize ripple, the patent uses periodic sampling and correction only when needed. The system monitors the reference voltage and applies corrections at discrete intervals based on actual deviations, rather than maintaining high standby current for continuous regulation. This reduces power consumption while maintaining stability.
Solution Approach 2:
The reference voltage generator serves itself by incorporating an integrated control block that autonomously monitors and corrects its own output voltage. The system uses internal sampling and correction mechanisms without requiring external continuous intervention, reducing the need for high standby current while maintaining voltage stability through self-regulation.
3Measurement precision
If reference cells are used for sensing, then additional area in the array is needed and the cells are more complicated
Solution Approach 1:
The patent extracts the reference voltage generation function from the memory array itself and places it in a separate, dedicated reference generator circuit. Instead of using memory cells within the array for reference sensing, the system uses an external reference voltage generator that provides reference levels without occupying valuable array area. This separation allows precise sensing while minimizing impact on memory capacity.
Solution Approach 2:
The reference generator is designed as a multi-functional unit that serves multiple purposes: generating reference voltages for sensing, providing calibration signals, and supporting various memory operations. This universal reference generator replaces the need for separate reference cells throughout the array, reducing overall area requirements while maintaining sensing precision through a centralized, sophisticated reference source.
4Speed
If VSS-sensing is implemented, then fast sensing is enabled, but a stable reference level close to VSS is difficult to generate
Solution Approach 1:
The patent implements a feedback control mechanism specifically tailored for generating stable reference levels near VSS. The control block continuously monitors the reference voltage and applies corrective pulses to maintain stability, even in the challenging low-voltage region close to ground. This feedback ensures reliable VSS-sensing operation despite the inherent difficulties of generating stable references near ground potential.
Solution Approach 2:
The system dynamically adjusts operating parameters of the reference generator based on the required reference level. When generating references close to VSS, the circuit modifies its internal operating conditions, such as transistor biasing and current levels, to maintain stability in this challenging voltage region. These parameter changes enable reliable VSS-sensing while preserving reference voltage stability near ground.
Data Source
AI summary
In a method of operating a reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level, an oscillator sends requests for sampling and correction to a control block between accesses of the eDRAM. The control block sends a pulse defining a time interval during which sampling and correction occurs to a pulse generator. A reference generator provides the reference level to a comparator. The comparator compares the reference level with a sampling of a reference voltage to decide if the reference voltage requires correction. The comparator sends a correction request to a pulse generator if the reference voltage requires correction. The pulse generator generates a correction pulse for a driver according to the correction request from the comparator. The driver adjusts the reference voltage during the correction pulse.