EEPROM Cell Hot Carrier Injection Programming
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Solution Overview
Problem
Conventional EEPROM memory cells face challenges in achieving low programming voltages, fast programming times, high write/erase cycles, and long data retention, particularly at high temperatures, while also being cost-effective and easy to fabricate.
Innovation Solution
The EEPROM cell design includes a programming capacitor with a deposited polysilicon layer over an implanted P-well region, coupled with an NMOS transistor and a polysilicon link, allowing for efficient electron storage and removal using hot carrier injection, with a lower programming voltage of approximately twelve volts and improved data retention through a polysilicon link and field oxide layer configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If conventional EEPROM cells use Fowler-Nordheim tunneling with thick tunnel oxide (70-120 angstroms), then data retention is improved, but programming voltage requirements increase and programming time increases
Solution Approach 1:
The patent changes the physical parameters of the tunnel oxide layer by reducing its thickness to 20-50 angstroms, which enables hot carrier injection programming at lower voltages (10-15V) while maintaining adequate data retention characteristics. This parameter change resolves the contradiction between data retention and programming voltage requirements.
Solution Approach 2:
The patent substitutes Fowler-Nordheim tunneling with hot carrier injection as the programming mechanism. This replacement allows electrons to be injected into the floating gate through thermal acceleration in a high-field region, eliminating the need for high-voltage Fowler-Nordheim tunneling while achieving comparable programming effectiveness at lower voltages.
2Reliability
If conventional EEPROM cells use Fowler-Nordheim tunneling, then programming is achieved, but programming time increases due to thick tunnel oxide
Solution Approach 1:
By reducing the tunnel oxide thickness from 70-120 angstroms to 20-50 angstroms, the patent significantly accelerates the hot carrier injection process. The thinner oxide allows faster electron traversal and injection into the floating gate, reducing programming time while maintaining programming effectiveness.
Solution Approach 2:
The substitution of hot carrier injection for Fowler-Nordheim tunneling fundamentally changes the programming mechanism from a slow tunneling process through thick oxide to a faster thermal injection process through thin oxide, directly addressing the programming time issue.
3Adaptability or versatility
If conventional EEPROM cells use multiple polysilicon layers and metal couplings, then functionality is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges the floating gate and control gate into a single deposited polysilicon layer, eliminating the need for separate polysilicon layers and metal coupling structures. This consolidation simplifies the fabrication process while maintaining the essential memory cell functionality through the polysilicon link structure.
Solution Approach 2:
The deposited polysilicon layer serves multiple functions simultaneously: it forms the floating gate for charge storage, the control gate for programming control, and provides structural continuity through the polysilicon link. This multi-functionality reduces the number of separate components and fabrication steps required.
4Reliability
If conventional EEPROM cells aim for high write/erase cycles and long data retention, then performance is improved, but programming voltage increases
Solution Approach 1:
The patent changes the tunnel oxide thickness parameter to 20-50 angstroms, which enables repeated hot carrier injection cycles at low voltages (10-15V). This parameter optimization allows the memory cell to withstand high write/erase cycle counts without degradation while maintaining low programming voltage requirements.
Solution Approach 2:
The use of hot carrier injection instead of Fowler-Nordheim tunneling provides a more gentle programming mechanism that causes less stress and damage to the oxide layers during each cycle, thereby enabling higher write/erase cycle durability at lower voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves efficient programming and erasing with reduced voltage requirements, increased cycle durability, and extended data retention, making it a cost-effective and high-performance memory solution.
Implementation Method 1
allowing for efficient electron storage and removal using hot carrier injection
Implementation Method 2
This is commonly accomplished by Fowler-Nordheim tunneling using a semiconductor device having a tunnel oxide with a thickness on the order of 70-120 angstroms disposed between a silicon substrate and the floating gate. A relatively strong electric field (e.g., greater than 10 mV/cm) is applied across the gate oxide, causing electrons to tunnel from the floating gate toward the underlying source, drain, or channel region
Data Source
AI summary
Semiconductor structures are adapted to form an electrically erasable programmable read only memory (EEPROM) cell having a long retention life, and/or a reduced programming voltage, and/or a reduced semiconductor real estate, and/or a reduced number of semiconductor fabrication steps.