EEPROM Refresh Control via External System Coordination
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Solution Overview
Problem
EEPROMs require frequent refresh operations at elevated temperatures, which disrupt external system access and necessitate additional control logic and memory space, leading to inefficiencies and layout issues.
Innovation Solution
A method that allows an external system to control refresh operations in EEPROMs using a refresh state machine, page register with latches, and controller to manage refresh requests and acknowledge signals, enabling external system control over memory refresh without blocking access or requiring additional non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the EEPROM autonomously determines when to refresh itself, then data retention is maintained, but external system access is blocked or suspended during refresh operations
Solution Approach 1:
The patent introduces a refresh controller as an intermediary component that manages the conflict between autonomous refresh operations and external system access. The refresh controller receives refresh requests from the memory array, coordinates with the external system through a shared bus, and schedules refresh operations during idle periods, thereby maintaining data retention without blocking external access.
Solution Approach 2:
The patent implements dynamic scheduling of refresh operations based on real-time system conditions. The refresh controller monitors external system activity and dynamically adjusts refresh timing to occur during idle periods, transforming the static autonomous refresh mechanism into a dynamic, condition-based operation that adapts to external access patterns.
2Extent of automation
If the EEPROM includes control logic for autonomous refresh coordination, then refresh operations can be managed, but additional memory and layout space are required
Solution Approach 1:
The patent designs the refresh controller to perform multiple functions: it manages refresh scheduling, monitors external system access patterns, coordinates bus transactions, and controls memory array operations. By making the refresh controller a multi-functional component, the patent reduces the need for separate dedicated circuits for each function, thereby minimizing the additional space required while maintaining autonomous refresh capability.
Data Source
AI summary
A non-volatile memory and a method of refreshing a memory are described. The method includes allowing an external system to control refreshing operations within the memory. The memory may generate a refresh request signal and transmit the refresh request signal to the external system. When the external system finds an available time to process the refresh request, the external system acknowledges the refresh request and transmits a refresh acknowledge signal to the memory. The memory may also comprise a page register for reading and rewriting a data state back to the memory. The page register may comprise latches in lieu of supplemental non-volatile storage elements, thereby conserving real estate within the memory.