Electric Fuse Wiring with Pollution-Control Layer for Reliable Post-Mold Relief
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Solution Overview
Problem
Conventional semiconductor integrated circuits using laser fuses for relief processing face limitations in performing post-mold processing due to external laser irradiation, which restricts the ability to trim and repair circuits after molding, and electric fuses suffer from reliability issues like crack formation and material dispersion during cutting, affecting the chip's reliability and yield.
Innovation Solution
The semiconductor integrated circuit employs an electric fuse with a pollution-control layer and via hole wirings to prevent material dispersion and enhance reliability, featuring a power supply circuit that minimizes the cutting current and uses Cu as the fuse wiring material to ensure stable cutting, with a crack expansion prevention layer to manage stress and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of repair
If laser fuse cut by external laser irradiation is used, then fuse cutting can be performed, but relief processing cannot be performed after molding
Solution Approach 1:
The patent replaces the external laser irradiation method with an internal electric current-based melting mechanism. The fuse wiring is designed to melt when a predetermined current value is applied, eliminating the need for external laser equipment and enabling post-mold relief processing. This substitution of the cutting mechanism allows the fuse to be trimmed immediately after test using a circuit tester.
2Adaptability or versatility
If electric fuse is used for relief processing, then post-mold trimming is enabled, but material dispersion and crack formation reduce reliability
Solution Approach 1:
The patent introduces a pollution-control layer as an intermediary between the fuse wiring and the surrounding environment. This layer prevents dispersing wiring material from contaminating peripheral circuits during the melting process, thereby maintaining circuit reliability while enabling electric fuse-based relief processing.
Solution Approach 2:
The patent employs a crack expansion prevention layer that is formed beforehand to suppress crack propagation from the cut section. This layer acts as a cushioning barrier that prevents cracks from expanding into the surrounding wiring, thereby maintaining circuit integrity and reliability during the fuse cutting process.
3Ease of repair
If power supply circuit is added for electric fuse cutting, then fuse trimming is enabled, but chip area increases
Solution Approach 1:
The patent utilizes the existing circuit tester used for device testing to perform the fuse trimming operation. The circuit tester already provides the necessary power supply and control functions, so no dedicated trimming equipment or additional power supply circuit is required within the chip. This multi-use approach enables fuse trimming without increasing chip area.
4Reliability
If pollution-control layer and via hole wirings are added, then material dispersion is prevented, but device complexity increases
Solution Approach 1:
The patent integrates the pollution-control layer and crack expansion prevention layer into the existing multi-layer wiring structure of the semiconductor device. These protective layers are formed as part of the standard layering process, combining contamination prevention and crack suppression functions within the existing structural framework, thereby minimizing the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for reliable one-step relief processing post-mold, reduces chip size, and improves the yield by preventing material dispersion and ensuring stable cutting, thus enhancing the overall reliability and productivity of semiconductor integrated circuits.
Implementation Method 1
a fuse wiring cut by passing beyond a predetermined current value
Data Source
AI summary
A semiconductor integrated circuit which can perform reliable relief processing using an electric fuse. The semiconductor integrated circuit includes a fuse wiring, a first electrode pad, a second electrode pad, a pollution-control layer, and a first via hole wiring and a second via hole wiring. The fuse wiring is cut by current exceeding a predetermined value. A first electrode pad is connected to one side of a fuse wiring, a second electrode pad is connected to the other of a fuse wiring, a pollution-control layer is formed in the upper layer and the lower layer of the fuse wiring via an insulating layer. In the fuse wiring, second via hole wiring of a pair is formed in the outside of a first via hole wiring so that the first the via hole wiring is surrounded.