Electro-optical Device Stacked Storage Capacitor Light Shielding
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Solution Overview
Problem
The complexity of the stacked structure and manufacturing process in electro-optical devices, such as liquid crystal devices, leads to deteriorated display quality due to light leakage and parasitic capacitance issues, complicating the integration of high-density circuit elements while maintaining high contrast and pixel aperture ratio.
Innovation Solution
The electro-optical device features a simplified stacked structure with storage capacitors and pixel electrodes positioned above data lines, incorporating conductive light shielding films to reduce optical leakage and parasitic capacitance, and uses interlayer insulating films to shield the channel region of thin film transistors from light, along with a planarization process to ensure flat surfaces and improved alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a light shielding layer is provided in the vicinity of the semiconductor layer to prevent light leakage current, then display quality is improved, but device complexity increases
Solution Approach 1:
The patent combines the light shielding function with existing structural elements (pixel electrodes, storage capacitor electrodes, and data lines) by forming them as stacked conductive films. This merging approach eliminates the need for separate light shielding layers while maintaining light shielding performance and improving display quality.
Solution Approach 2:
The patent makes existing structural elements serve multiple functions: the pixel electrodes and storage capacitor electrodes not only perform their primary electrical functions but also serve as light shielding layers. The data lines similarly serve both signal transmission and light shielding purposes, reducing overall device complexity.
2Volume of moving object
If various circuit elements are integrated on substrate in high density to make device small, then device size is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacked integration, arranging pixel electrodes, storage capacitors, and data lines in vertical layers. This dimensional change enables high-density integration while simplifying the manufacturing process through sequential film formation and patterning steps.
Solution Approach 2:
The patent divides the device into distinct functional layers (pixel electrode layer, storage capacitor layer, data line layer, etc.), with each layer formed and patterned separately. This segmentation allows for simplified manufacturing of each layer independently while achieving high overall integration density through vertical stacking.
3Reliability
If storage capacitor capacitance is increased for high contrast display, then contrast ratio is improved, but pixel aperture ratio is sacrificed
Solution Approach 1:
The patent moves the storage capacitor from a planar configuration to a vertically stacked configuration above the data line. This dimensional change allows the storage capacitor to occupy vertical space rather than horizontal pixel area, enabling high capacitance for improved contrast ratio while maintaining large pixel aperture ratio.
Solution Approach 2:
The patent nests the storage capacitor structure within the vertical columnar structure formed by the data line and associated electrodes. The storage capacitor electrodes are positioned above and integrated with the data line structure, allowing compact nesting that maximizes capacitance within minimal pixel area.
4Ease of manufacture
If pixel electrodes and parasitic capacitors are located below pixel electrodes, then manufacturing is simplified, but image signal is deteriorated
Solution Approach 1:
The patent extracts the parasitic capacitor (storage capacitor) from its traditional position directly below the pixel electrode and relocates it to a vertical position above the data line. This extraction eliminates the parasitic capacitance between the pixel electrode and storage capacitor electrode, improving image signal quality while maintaining manufacturing simplicity through sequential layer formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the contrast ratio and display quality by minimizing optical leakage and parasitic capacitance, simplifying the manufacturing process, and improving yield while maintaining high-density integration.
Implementation Method 1
At least one of the fixed-potential-side electrode and the pixel-potential-side electrode includes a first conductive light shielding film
Implementation Method 2
uses interlayer insulating films to shield the channel region of thin film transistors from light
Data Source
AI summary
An electro-optical device includes: a substrate; data lines and scanning lines extending to cross each other on the substrate; thin film transistors disposed below the data lines on the substrate; storage capacitors each of which is disposed in a region including a region facing a channel region of each of the thin film transistors in plan view above the substrate and is disposed above each of the data lines, each of the storage capacitors being formed by stacking a fixed-potential-side electrode, a dielectric film, and a pixel-potential-side electrode in this order from below; and pixel electrodes that are disposed for respective pixels defined in correspondence with the data lines and the scanning lines in plan view above the substrate and are disposed above the storage capacitors, each of the pixel electrodes being electrically connected to the pixel-potential-side electrode and each of the thin film transistors. At least one of the fixed-potential-side electrode and the pixel-potential-side electrode includes a first conductive light shielding film.


