Semiconductor Electrode Terminal via Metal Plate Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semi-additive process (SAP) method for forming electrode terminals in semiconductor devices faces issues such as increased aspect ratio of via holes leading to incomplete filling with conductive material, long filling times, and potential damage from electrolyte solutions, along with stress concentration and cracking due to discontinuous corners between sealing resin and electrode terminals.

Innovation Solution

A manufacturing method involving a metal plate with a projection part mounted on the substrate, sealed with resin, and an electrode terminal formed by etching the metal plate, which includes a skirting part with a concave curved surface to reduce stress concentration on the resin.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the SAP method is used to form electrode terminals, then the electrode terminal can be connected to the electrode on the substrate, but the via hole is not completely filled with conductive material when the aspect ratio increases

Engineering Contradiction:
Improvefilling completeness of via holeVSAvoidaspect ratio of via hole
Core Design Contradiction:
Manufacturing precisionVSLength of stationary object

Solution Approach 1:

The via hole is formed and prepared in advance before the conductive material filling process. The preliminary formation of the via hole structure allows for optimized filling conditions to be applied subsequently, ensuring complete filling even when the aspect ratio is high. This separates the hole formation from the filling process, allowing each to be optimized independently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the filling parameters by using electroplating instead of traditional filling methods. By controlling the plating current density, time, and electrolyte composition, the filling process is optimized to completely fill high aspect ratio via holes. The parameter changes in the electroplating process enable complete filling where conventional methods fail.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the SAP method is used to form electrode terminals, then the electrode terminal can be formed, but it takes a long time to fill the via hole

Engineering Contradiction:
Improvefilling time of via holeVSAvoidcompleteness of via hole filling
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent replaces mechanical filling methods with electrochemical deposition (electroplating). Instead of mechanically injecting or depositing conductive material, an electric field is applied to drive metal ions to deposit uniformly within the via hole. This substitution dramatically reduces filling time while ensuring complete and uniform filling, resolving the contradiction between speed and completeness.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If a wet process such as the SAP method is applied on the semiconductor element, then the electrode terminal can be formed, but the semiconductor element may be damaged

Engineering Contradiction:
Improveprocessability of electrode terminal formationVSAvoidintegrity of semiconductor element
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts the electrode terminal formation process from the wet SAP process that exposes the semiconductor element to electrolyte solutions. By forming the electrode terminal through electroplating on the substrate side rather than immersing the semiconductor element in electrolyte, the harmful wet process is removed from the semiconductor element's environment, preventing damage while maintaining manufacturing capability.

Inventive Principle:
Principle #2Taking out (Extraction)

4Ease of manufacture

If the electrode terminal has a discontinuous corner at the boundary portion, then the electrode terminal can be formed by SAP method, but stress is concentrated on the sealing resin causing cracks

Engineering Contradiction:
Improveformability of electrode terminalVSAvoidstress resistance of sealing resin
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent eliminates the discontinuous corner by forming a continuous, curved electrode terminal structure that smoothly transitions from the via hole to the exposed surface. The curved geometry distributes stress evenly along the electrode terminal and sealing resin interface, preventing stress concentration and crack formation. This curvature principle resolves the contradiction between ease of formation and stress resistance.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces the time required to form electrode terminals, prevents damage to semiconductor elements, and suppresses cracking by distributing stress evenly across the concave curved surface, enhancing the reliability of the semiconductor device.

Implementation Method 1

sealing the semiconductor element and the projection part with a sealing resin, by filling the sealing resin between the first surface of the substrate and the main body part of the metal plate

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

forming an electrode terminal made of a base end part that is connected to the second electrode and has a side surface that is covered by the sealing resin, and a tip end part that is integrally formed with the base end part and that projects from a front surface of the sealing resin, by etching the main body part excluding a portion overlapping with the projection part

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10964553B2Manufacturing method of semiconductor device and semiconductor device
Publication Date: 2021.03.30 SHINKO ELECTRIC IND CO LTD
  • US10964553B2 patent drawing
  • US10964553B2 patent drawing
  • US10964553B2 patent drawing

AI summary

A manufacturing method of a semiconductor device includes mounting a semiconductor element on a first electrode disposed on a first surface of a substrate; preparing a metal plate including a main body part and a projection part; mounting the metal plate on the first surface side of the substrate, by joining the projection part to a second electrode that is disposed on the first surface of the substrate; sealing the semiconductor element and the projection part with a sealing resin; and forming an electrode terminal made of a base end part that is connected to the second electrode and has a side surface that is covered by the sealing resin, and a tip end part that is integrally formed with the base end part and that projects from a front surface of the sealing resin, by etching the main body part excluding a portion overlapping with the projection part.