Electronic Component Insulating Film Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic components with solder bumps on common substrates face limitations in achieving finer pitches and design flexibility due to variations in solder bump size and mounting position accuracy, which increases processing complexity and cost.
Innovation Solution
The electronic component design features a conductive pattern with lands extending in the direction of adjacent elements, surrounded by insulating films spaced apart from the land edges, allowing solder bumps to extend perpendicular to the lands during reflow, reducing mounting position variations and enabling finer pitches with improved alignment and reduced design restrictions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the size of openings in the insulating film is reduced to achieve finer pitches and lower profiles, then the pitch of bumps can be reduced and profile lowered, but processing accuracy requirements increase and cost increases
Solution Approach 1:
The insulating film structure is segmented into multiple layers: a first insulating film with openings and a second insulating film without openings. This segmentation allows the first insulating film to provide electrical isolation while the second insulating film provides mechanical support and positioning, enabling finer bump pitches without requiring excessively small openings in the first insulating film.
Solution Approach 2:
The solution adds a second insulating film layer in the vertical dimension (z-direction) to compensate for the reduced horizontal (x-y plane) opening size. By distributing the functional requirements across multiple dimensions, the patent enables finer pitches while maintaining reasonable processing accuracy requirements for each individual layer.
2Adaptability or versatility
If the size of openings in the insulating film is increased to accommodate variations in solder bump size, then the permissible range of variations in solder bump size increases, but variations in mounting positions of elements increase
Solution Approach 1:
The insulating film is divided into two functional layers: the first insulating film with openings that accommodates solder bump size variations, and the second insulating film that provides precise positioning references. This segmentation allows each layer to optimize for its specific function without compromising the other.
Solution Approach 2:
The second insulating film acts as an intermediary between the first insulating film and the substrate, providing a stable reference framework that decouples the tolerance accommodation function (first insulating film) from the positioning function (second insulating film).
3Reliability
If the conductive pattern is made larger than the openings in the insulating film to account for displacements, then connection reliability improves, but design flexibility is restricted
Solution Approach 1:
The patent utilizes the vertical dimension by adding a second insulating film layer, which allows the first insulating film openings to be smaller while still maintaining reliable connections. This dimensional addition provides the extra margin needed for displacement tolerance without increasing the horizontal footprint of conductive patterns.
Solution Approach 2:
The invention changes the structural parameters of the insulating film system from a single thick layer to multiple thinner layers, which alters how displacements are accommodated and enables more flexible conductive pattern designs while maintaining connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces variations in mounting positions and supports finer pitches, enhancing connection reliability and design flexibility while maintaining accurate element placement, even with variations in solder bump size, thus improving manufacturing efficiency and reducing costs.
Implementation Method 1
The solder bumps are joined by reflowing
Implementation Method 2
the gold bumps are joined by ultrasonic bonding
Implementation Method 3
the solder bumps wet and spread while being trapped inside the openings in the insulating film
Data Source
AI summary
An electronic component achieves reduced variations in the mounting positions of elements even with variations in the size of solder bumps and easily supports finer pitches of the bumps. The electronic component includes a common substrate, at least two elements mounted on a first main surface of the common substrate, a conductive pattern provided on the first main surface of the common substrate so as to extend in a direction along which the at least two elements are disposed adjacent to each other and including a plurality of lands arranged at positions corresponding to terminals of the elements insulating films provided at least on the conductive pattern so as to be spaced apart from both side edges of the lands in a direction perpendicular or substantially perpendicular to a land extending direction and adjacent to both ends of the lands in the land extending direction, and solder bumps that are disposed on the lands and are arranged to connect the lands and the terminals of the elements.


