Electronic Fuse Storage with ECC Error Correction

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Solution Overview

Problem

The reliability of electronic fuses in Integrated Circuits (ICs) degrades over time, leading to false readings and potential malfunction of the IC, especially in BISR systems where accurate data retrieval is critical.

Innovation Solution

The implementation of an Error Correction Code (ECC) scheme that stores parity bits alongside data bits in electronic fuses, along with access information, to enable error correction during data retrieval, thereby enhancing the reliability of fuse-based storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electronic fuses are used to store configuration data in ICs, then the IC can be configured at power up, but the reliability of data storage degrades over time due to fuse degradation and false readings

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidfuse lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing error correction codes (ECC) alongside the configuration data in the electronic fuses. This allows errors to be corrected in advance without requiring re-programming, thus maintaining reliability over the fuse's lifetime. The ECC data is prepared beforehand and stored in the same fuse array, enabling automatic error correction during read operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the ECC verification process. When configuration data is read from the electronic fuses, the stored ECC codes are used to verify data integrity. If errors are detected, the system uses the ECC information to correct the errors and generates a status indication. This feedback mechanism ensures that degraded fuse readings are automatically corrected, maintaining reliable data storage over time.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If error correction coding is implemented in electronic fuses, then data retrieval accuracy is improved, but the complexity of the storage system increases due to additional parity bits and access information

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidstorage system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the storage of configuration data and error correction codes into a single integrated system within the electronic fuse array. Both the original configuration data and the ECC parity bits are stored in the same fuse structure, along with access information indicating their locations. This consolidation improves data retrieval accuracy through error correction while managing system complexity by utilizing the existing fuse infrastructure for multiple purposes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The electronic fuse array is designed to serve multiple functions: storing configuration data, storing ECC parity bits, and storing access information. This multi-functionality allows the same hardware structure to provide both data storage and error correction capabilities, improving retrieval accuracy without proportionally increasing system complexity. The universal fuse structure handles all three types of information uniformly.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12266415B1Reliable electronic fuse based storage using error correction coding
Publication Date: 2025.04.01 MARVELL ASIA PTE LTD
  • US12266415B1 patent drawing
  • US12266415B1 patent drawing
  • US12266415B1 patent drawing

AI summary

An apparatus for reliable fuse-based storage in an Integrated Circuit (IC) includes a plurality of electronic fuses and processing logic. The electronic fuses store (i) data bits, (ii) parity bits that were generated from the data bits in accordance with an Error Correction Code (ECC) scheme, and (iii) access information required for accessing the data bits and the parity bits. The processing logic receives a read command for reading given data bits from the electronic fuses, based on the read command retrieves access information specifying given electronic fuses storing the given data bits and given parity bits associated with the given data bits, using the access information reads the given data bits and the given parity bits from the given electronic fuses, applies the ECC scheme to the given data bits and the given parity bits, using the ECC module to generate corrected data bits, and outputs the corrected data bits.