Electronic Member Carrier for Thin Chip Manufacturing
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Solution Overview
Problem
The existing manufacturing processes for electronic devices, particularly those involving thin or ultra-thin chips, are costly and prone to damage due to the complexity of the process chain and sensitivity of the chips during handling and soldering.
Innovation Solution
A method involving the use of a carrier with electrically conductive terminals to attach and connect electronic members, followed by encapsulation and reduction in thickness, allowing for external access of the terminals for electrical connection, thereby reducing the number of process steps and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thin or ultra-thin chips are handled and soldered using conventional housing technology, then electrical connection is achieved, but the risk of chip damage increases due to sensitivity during handling and soldering
Solution Approach 1:
The chip is attached to the carrier before thinning, and the carrier is prepared in advance with recesses and conductive structures. This preliminary preparation allows the chip to be protected during subsequent processing steps, reducing damage risk while maintaining a streamlined process
Solution Approach 2:
The carrier acts as an intermediary structure between the chip and the final device. It provides mechanical support, electrical connection, and protection during processing, eliminating the need for complex handling and soldering operations while ensuring reliable electrical contact
2Ease of manufacture
If conventional housing technology is used to connect individualized elements to periphery, then electrical connection is achieved, but manufacturing costs increase due to enlarged process chain with many sequential steps
Solution Approach 1:
Multiple functions (mechanical support, electrical connection, protection, and positioning) are merged into a single carrier structure. This integration eliminates numerous sequential steps in conventional housing technology, reducing both manufacturing cost and process time while maintaining connection quality
3Length of moving object
If chip thickness is reduced to achieve thin or ultra-thin chips, then device miniaturization is achieved, but thermal and electrical resistances increase
Solution Approach 1:
The carrier provides extended conductive paths in the lateral dimension to compensate for the reduced thickness in the vertical dimension. This dimensional transition maintains electrical and thermal conductivity despite the chip being thinned, as the carrier's conductive structures provide alternative pathways for current and heat flow
Data Source
AI summary
A method for manufacturing an electronic interconnect device is described, the method comprising: providing an electronic members each having one or more electrical contacts on a first member side thereof; providing a carrier having a carrier base and having sets of one or more electrically conductive projections on a surface of the carrier base; attaching the electronic members with the corresponding contacts thereof to the respective set of projections to thereby electrically connect the one or more electrical contacts of the respective chip with the corresponding one or more electrically conductive projections of the respective set; encapsulating exposed portions of the electronic member with an encapsulating material to form an encapsulation.