Electronic Package Lamination for Thermal Stress Delamination Control

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Solution Overview

Problem

Conventional semiconductor packages face issues of delamination and structural cracking due to uneven thermal stress caused by mismatched heights of package modules and semiconductor chips, leading to potential breakage of the carrier structure and cracking of functional chips.

Innovation Solution

The introduction of a laminating member, which can be a glass or mesh structure, bonded to the semiconductor chip and package module via a heat dissipating layer, and a heat dissipating member with a supporting leg, distributes thermal stress evenly and increases structural rigidity, preventing delamination and cracking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If package module and semiconductor chip are disposed on carrier structure with different heights, then functional integration is achieved, but thermal stress becomes uneven causing delamination

Engineering Contradiction:
Improvefunctional integrationVSAvoidthermal stress uniformity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A stress compensation layer is introduced between the semiconductor chip and the carrier structure. This intermediary layer has different elastic moduli on its upper and lower surfaces, allowing it to compensate for the height difference between the package module and semiconductor chip, thereby equalizing thermal stress distribution and preventing delamination while maintaining functional integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If heat dissipating member is laminated directly to components of different heights, then heat dissipation is achieved, but pressure inconsistency causes carrier structure breakage

Engineering Contradiction:
Improveheat dissipationVSAvoidcarrier structure integrity
Core Design Contradiction:
TemperatureVSStrength

Solution Approach 1:

The stress compensation layer serves as an intermediary between the heat dissipating member and the components below. It provides a uniform bonding surface that distributes pressure evenly across the carrier structure, preventing breakage while allowing effective heat dissipation to occur through the heat dissipating member.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If package module height exceeds semiconductor chip height, then optical integration is enabled, but uneven pressure distribution causes functional chip cracking

Engineering Contradiction:
Improveoptical integrationVSAvoidfunctional chip integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The stress compensation layer acts as a mediator that equalizes pressure distribution from the heat dissipating member across both the package module and semiconductor chip. By having different elastic moduli on its upper and lower surfaces, it compensates for the height difference, enabling optical integration while preventing functional chip cracking through uniform stress distribution.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The laminating member effectively disperses thermal stress, ensuring even pressure distribution and preventing structural breakage and chip cracking, thereby enhancing the reliability and integrity of the semiconductor package.

Implementation Method 1

a laminating member disposed on the semiconductor chip and the package module; and a heat dissipating member disposed on the first side of the carrier structure and on the laminating member

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

the supporting leg is bonded to the first side of the carrier structure via an adhesive material

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS20260090376A1Electronic package and manufacturing method thereof
Publication Date: 2026.03.26 SILICONWARE PRECISION IND CO LTD
  • US20260090376A1 patent drawing
  • US20260090376A1 patent drawing
  • US20260090376A1 patent drawing

AI summary

An electronic package is provided. A package module and a semiconductor chip are disposed on a carrier structure, and a laminating member is disposed on the semiconductor chip and the package module. A heat dissipating member is then disposed on the carrier structure and the laminating member. Therefore, by arranging the laminating member, the stress of the carrier structure can be evenly distributed to prevent the problem of delamination from occurring to the semiconductor chip. A manufacturing method of the electronic package is also provided.