On-Chip Aging Sensor Using Electromigration for Counterfeit IC Detection
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Solution Overview
Problem
Existing integrated circuit (IC) aging sensors are inadequate for accurately detecting the usage time of chips due to large area overhead and inability to reflect true aging-dependent usage, particularly in the presence of temperature variations, and fail to effectively detect non-defective counterfeit ICs.
Innovation Solution
A lightweight on-chip aging sensor based on electromigration (EM)-induced aging effects, utilizing a physics-based stress evolution model to design interconnect wire structures that fail at specific times, combined with an antifuse memory for post-fabrication authentication and unique chip ID registration, to accurately predict chip usage and prevent counterfeit ICs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional aging sensors are used to detect chip usage time, then aging detection capability is provided, but area overhead becomes large
Solution Approach 1:
The patent extracts the aging sensing function from traditional complex sensor structures and implements it using only interconnect wires that naturally exhibit electromigration effects. By taking out the dedicated sensor circuitry and using the interconnect wires themselves as the sensing element, the area footprint is dramatically reduced while maintaining aging detection capability through measurement of resistance changes in the wires over time.
2Measurement precision
If existing aging sensors are used, then usage time detection is attempted, but ability to reflect true aging-dependent usage is insufficient
Solution Approach 1:
The patent changes the measurement parameter from direct temperature sensing to electromigration-induced resistance changes in interconnect wires. By monitoring the resistance evolution of wires subjected to controlled current stress, the system captures true aging-dependent usage patterns that inherently account for temperature effects, since electromigration is temperature-dependent and occurs naturally during chip operation under varying thermal conditions.
3Ease of manufacture
If simple detection methods are used, then implementation is easier, but ability to detect non-defective counterfeit ICs is lost
Solution Approach 1:
The patent applies preliminary action by pre-stressing the interconnect wires during manufacturing to accelerate electromigration and create predictable aging characteristics. This preliminary stress treatment establishes a known aging trajectory that can be monitored over time, enabling detection of counterfeit ICs that lack the proper aging profile or have been improperly manufactured, while keeping the implementation simple by using standard wire structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The EM-based aging sensor provides accurate prediction of chip usage time with smaller area footprints and temperature consideration, while the combined solution effectively detects and prevents both defective and non-defective counterfeit ICs, enhancing security and reliability in critical systems.
Implementation Method 1
EM-based aging sensor exploits the natural aging/failure mechanism of interconnect wires to time the aging of the chip
Data Source
AI summary
An on-chip aging sensor and associated methods for detecting counterfeit integrated circuits are shown. In one example, the on-chip aging sensor is integrated within a chip. In one example, the on-chip sensor includes both an on-chip age sensor, and an antifuse memory block including static information unique to the chip.