Embedded Bridge Semiconductor Structure for TSV Integration
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in efficiently integrating through silicon vias (TSVs) into semiconductor devices, particularly in achieving reliable electrical connections and reducing manufacturing costs while maintaining structural integrity.
Innovation Solution
A method involving the formation of conductive vias within the semiconductor substrate, followed by fusion bonding and planarization processes to create through silicon vias (TSVs), which are then integrated with hybrid bonding techniques to connect multiple semiconductor components, enhancing electrical connectivity and reducing material usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through silicon vias (TSVs) are integrated into semiconductor devices, then electrical connectivity is improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is divided into distinct stages: forming conductive plugs in recesses, performing fusion bonding between substrates, and then planarizing to expose the TSVs. This segmentation allows each step to be optimized independently, reducing overall manufacturing complexity while maintaining electrical connectivity reliability
Solution Approach 2:
Conductive plugs are formed in recesses before fusion bonding occurs. This preliminary action ensures that electrical connections are pre-established between substrates, allowing the TSV integration to proceed with improved reliability without adding excessive complexity during the bonding stage
2Manufacturing precision
If fusion bonding and planarization processes are used to create TSVs, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The fusion bonding process combines multiple functions: it bonds substrates together while simultaneously exposing the pre-formed conductive plugs to create functional TSVs. This merging of bonding and TSV formation into a single step achieves high manufacturing precision without proportionally increasing cost
Solution Approach 2:
The planarization process automatically exposes the TSVs by removing excess material, allowing the TSV structure to self-reveal without requiring additional complex processing steps. This self-service approach maintains precision while controlling manufacturing cost
3Productivity
If hybrid bonding techniques are used to connect semiconductor components, then I/O counts are increased, but device complexity increases
Solution Approach 1:
The invention moves electrical connections from a planar dimension to a three-dimensional vertical dimension through TSVs. This dimensional change allows multiple I/O connections to be stacked vertically, increasing I/O counts without proportionally increasing lateral device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach facilitates efficient electrical connections and cost-effective manufacturing of semiconductor structures with improved yield and reduced material waste, while maintaining structural integrity and enabling higher I/O counts.
Implementation Method 1
fusion bonding and planarization processes to create through silicon vias (TSVs)
Data Source
AI summary
A semiconductor structure includes a first semiconductor device, a second semiconductor device, a connection device and a redistribution circuit structure. The first semiconductor device is bonded on the second semiconductor device. The connection device is bonded on the second semiconductor device and arranged aside of the first semiconductor device, wherein the connection device includes a first substrate and conductive vias penetrating through the first substrate and electrically connected to the second semiconductor device. The redistribution circuit structure is located over the second semiconductor device, wherein the first semiconductor device and the connection device are located between the redistribution circuit structure and the second semiconductor device. The redistribution circuit structure and the first semiconductor device are electrically connected to the second semiconductor device through the conductive vias of the connection device.