Embedded Capacitors via Pattern Plating Vias
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Solution Overview
Problem
The existing drill & fill technology for fabricating vias in electronic substrates limits the creation of non-circular vias and requires expensive laser drilling, leading to difficulties in cross-section control, shape precision, and increased complexity, which hinders the miniaturization and integration of high-density interconnects and embedded capacitors.
Innovation Solution
The use of pattern plating technology, where a metal seed layer is deposited, followed by photo-resist patterning and copper electroplating to create vias of various shapes and sizes, allowing for the fabrication of capacitors with ceramic or metal oxide dielectric layers embedded in a polymer matrix, enabling precise control over via dimensions and shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If drill & fill technology is used to fabricate vias, then vias can be created in electronic substrates, but the technology limits the creation of non-circular vias, requires expensive laser drilling, and leads to difficulties in cross-section control and shape precision
Solution Approach 1:
The patent extracts the via formation process from the conventional drill & fill approach and replaces it with pattern plating. The photoresist pattern directly defines the via shape, eliminating the need for laser drilling and subsequent filling operations. This extraction of the via formation step to an earlier patterning stage enables precise shape control without the limitations of drill & fill technology.
Solution Approach 2:
The patent applies preliminary action by creating the photoresist pattern before via formation. The photoresist is patterned first, then copper is electroplated to form the via within the defined pattern. This preliminary patterning action establishes precise shape control from the outset, avoiding the need for post-drilling shape adjustments and eliminating laser drilling complexity.
2Ease of manufacture
If laser drilling is used in drill & fill technology, then vias can be created, but expensive equipment is required and cross-section control becomes difficult
Solution Approach 1:
The patent substitutes the mechanical laser drilling system with an electrochemical electroplating process. Instead of using expensive laser equipment to drill vias, the invention uses electroplating to deposit copper within photoresist-defined patterns. This replacement eliminates the need for costly laser drilling equipment while simultaneously improving cross-section control, as the electroplating process naturally produces uniform via cross-sections within the photoresist mold.
Solution Approach 2:
The patent introduces photoresist as an intermediary material that defines the via pattern and shape. The photoresist acts as a mold or template that guides the electroplating process, ensuring precise cross-section control. This intermediary approach replaces the direct laser-drilling-metal process with a photoresist-mediated electroplating process, achieving both cost reduction and precision improvement.
3Length of moving object
If thick cored interconnects are used, then structural integrity is maintained, but ultra-thin products cannot be achieved
Solution Approach 1:
The patent applies parameter changes by transitioning from thick cored interconnects to thin film interconnects. The via dimensions are reduced from thick to thin through controlled electroplating, enabling ultra-thin product profiles. Simultaneously, the use of copper as the via material and the electroplating process maintain structural integrity through controlled deposition, achieving both thinness and strength requirements.
4Productivity
If more layers of smaller connections are deposited to create higher densities, then interconnect density increases, but the fabrication process becomes more complex
Solution Approach 1:
The patent applies universality by using the same photoresist patterning and electroplating process for all via formations across multiple layers. This universal process approach eliminates the need for different via formation techniques for each layer, simplifying the multilayer fabrication process. The same methodology can be repeatedly applied to create higher densities of smaller connections without increasing process complexity, as the process is scalable and repeatable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the cost-effective fabrication of high-density interconnects and capacitors with precise dimensions, reducing tapering and roughness issues, and allowing for the integration of capacitors within substrates, enhancing miniaturization and reliability while simplifying the manufacturing process.
Implementation Method 1
a seed layer is first deposited over a substrate, providing a conducting layer onto which copper may be deposited
Implementation Method 2
Via posts are created by depositing copper into the photo-resist trenches
Data Source
AI summary
A substrate comprising a capacitor comprising metal electrodes and a ceramic or metal oxide dielectric layer, the capacitor being embedded in a polymer based encapsulating material and connectable to a circuit via a via post standing on said capacitor.