Embedded Charge Pumps for On-Die Power Regulation
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Solution Overview
Problem
Conventional power regulation circuits face challenges in responding quickly to high current load steps due to inherent impedance characteristics, leading to voltage droop, which can impair device operations or cause shutdowns, and the addition of magnetic components for improved response is complex and costly.
Innovation Solution
The integration of embedded charge pumps within high-performance chips or digital loads, using readily available components like switches and capacitors, reduces the effects of routing parasitics and enables efficient power regulation with improved transient response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power regulation circuits are used, then device operations can be maintained, but voltage droop occurs during high current load steps due to inherent impedance characteristics
Solution Approach 1:
The power regulation system is segmented into multiple independent charge pump circuits, each serving specific processor cores. This segmentation allows each charge pump to independently respond to current load steps of its assigned cores, improving response speed while maintaining voltage stability through distributed regulation.
Solution Approach 2:
The charge pump circuits are positioned close to the processor cores they serve, performing preliminary power regulation before current reaches the cores. This preliminary action reduces the distance current must travel through high-impedance paths, minimizing voltage droop during load transitions.
2Reliability
If additional power regulation circuits are added to improve voltage droop response, then voltage stability improves, but design complexity and cost increase due to large or exotic magnetic components
Solution Approach 1:
Magnetic components are replaced with electric-field-based charge pump circuits implemented using standard semiconductor fabrication processes. This substitution eliminates the need for large or exotic magnetic components, reducing design complexity and cost while improving voltage droop response through integrated circuits.
Solution Approach 2:
The invention changes the fundamental operating parameters of power regulation by using charge pump topology with capacitive energy storage instead of inductive components. This parameter change enables implementation with standard CMOS or BiCMOS processes, eliminating complex magnetic component requirements while achieving superior transient response.
3Device complexity
If power regulation circuits are isolated from high performance components, then design simplicity is maintained, but voltage droop persists or increases due to inherent impedance characteristics of the power rail
Solution Approach 1:
The charge pump circuits are integrated within the same integrated circuit die as the processor cores, adding a spatial dimension to power regulation. This on-die integration creates a three-dimensional power delivery architecture where regulation occurs at the source, reducing the impact of power rail impedance while maintaining design simplicity through monolithic integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the transient load response of power regulation circuits, reduces design complexity and costs, and minimizes power losses by doubling the voltage provided, thereby reducing current-related losses and enabling more compact device designs.
Implementation Method 1
enhances the transient load response of power regulation circuits, reduces design complexity and costs, and minimizes power losses by doubling the voltage provided
Data Source
AI summary
The present disclosure describes aspects of power regulation with charge pumps. In some aspects, an integrated circuit (IC) includes multiple processor cores and a power input connected to an internal power rail of the IC. The IC may also comprise embedded charge pumps coupled between the internal power rail of the IC and respective input power rails of the multiple processor cores. Capacitors of the embedded charge pumps may be implemented with on-die capacitors suitable for integration with a die of the circuit to facilitate the embedding of the charge pumps. Alternately or additionally, separate input power rails of the processor cores and the embedded charge pumps may enable more-efficient power regulation or power management on a per-processor core basis, such as when a processor core is throttled or idled to reduce power consumption.


