Embedded Semiconductor Chip Packaging With Metallic Frame Opening
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Solution Overview
Problem
Conventional semiconductor packaging methods face challenges in achieving precise opening shapes for embedding semiconductor chips, leading to uneven surfaces, increased fabrication costs due to excessive adhesive use, and reliability issues like short circuits and delamination.
Innovation Solution
A packaging structure with a substrate featuring a metallic frame around the opening, allowing precise laser ablation to form an accurate opening shape, and using a dielectric layer to fill the gap between the chip and the opening, eliminating the need for large gaps and reducing adhesive usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If continuous laser ablation is used to form an opening, then the fabrication process is simple, but the opening surface becomes uneven and the shape deviates from the predefined region
Solution Approach 1:
The patent applies periodic action by using intermittent laser ablation instead of continuous laser ablation. The laser beam is applied in periodic pulses to the substrate, allowing the material to be removed in controlled increments. This periodic exposure prevents the laser from continuously melting and resolidifying the material, thereby avoiding the formation of an uneven surface while still achieving the desired opening shape with high precision.
2Ease of operation
If a larger predefined opening region is used, then the semiconductor chip can be easily positioned, but a large gap is formed between the chip and opening requiring excessive adhesive material
Solution Approach 1:
The patent replaces the mechanical approach of using a larger opening with adhesive material to fill gaps with a laser-based approach. By using intermittent laser ablation, the opening is precisely formed to match the semiconductor chip dimensions, eliminating the need for excessive adhesive material. The laser energy directly removes material to create the exact opening shape needed, substituting the mechanical filling process with a precision material removal process.
3Ease of operation
If a large gap between the semiconductor chip and opening is formed, then chip insertion is easier, but recesses form on the dielectric layer surface causing short circuits and delamination
Solution Approach 1:
The patent applies pneumatics and hydraulics by using laser energy as a form of energy field to precisely control the opening formation. The laser beam acts as an energy source that selectively removes material through ablation, creating an opening that perfectly fits the semiconductor chip. This energy-based approach replaces mechanical insertion methods and prevents the formation of gaps that would lead to recesses, short circuits, and delamination, thereby ensuring high product reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures precise positioning of semiconductor chips, enhances product reliability by preventing recesses and delamination, simplifies fabrication processes, and reduces costs by minimizing adhesive requirements.
Implementation Method 1
a opening 100' is formed at the position of the predefined opening region 100 by laser ablation and penetrates the first surface 10a and the second surface 10b
Data Source
AI summary
A packaging structure having an embedded semiconductor element includes: a substrate having opposite first and second surfaces and at least an opening penetrating the first and second surfaces; a first metallic frame disposed around the periphery of the opening on the first surface; a semiconductor chip received in the opening and having an active surface formed with a plurality of electrode pads and an opposite inactive surface; two first dielectric layers formed on the active surface and the inactive surface of the chip, respectively; a first wiring layer formed on the first dielectric layer of the first surface; and a first built-up structure disposed on the first dielectric layer and the first wiring layer. A shape of the opening is precisely controlled through the first metallic frame around the periphery of the predefined opening region, thereby allowing the chip to be precisely embedded in the substrate.