Embedded Chip Package Structure with Segmented Shielding
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Solution Overview
Problem
The existing chip package structures face challenges in minimizing size and weight while providing effective electromagnetic shielding and heat dissipation, as traditional faraday cages increase the size and weight of the package.
Innovation Solution
An embedded chip package structure with a core layer, chip, and circuit layers that incorporate conductive poles or ring-shaped elements for electromagnetic shielding and heat dissipation columns, allowing for reduced thickness and efficient signal reception without increasing the package size, and enhancing heat dissipation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a faraday cage is placed to shield EMI, then electromagnetic shielding is improved, but the size and weight of the chip package structure increases
Solution Approach 1:
The patent divides the electromagnetic shielding function into multiple discrete conductive poles distributed across different layers (first circuit layer, second circuit layer, and ground layer) rather than using a single continuous faraday cage. These segmented conductive elements work together to provide shielding while occupying minimal space and adding negligible weight to the package structure.
2Object-affected harmful factors
If a faraday cage is placed to shield EMI, then electromagnetic shielding is improved, but the size of the chip package structure increases
Solution Approach 1:
The patent transitions from a two-dimensional surface-mounted faraday cage to a three-dimensional embedded shielding structure. Conductive poles are positioned at specific depths within the package layers, creating a volumetric shielding field that provides effective EMI protection without increasing the horizontal footprint or overall package dimensions.
3Length of stationary object
If the chip is embedded within the core layer and first circuit layer, then the overall height of the package is reduced, but the chip must be received through a through hole which complicates the structure
Solution Approach 1:
The through hole serves multiple functions simultaneously: it provides mechanical support for the chip, enables electrical connection between the chip and external circuits, and facilitates the embedding process. This multi-functional design reduces the need for separate components or structures, thereby minimizing overall package height without significantly increasing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The embedded chip package structure effectively reduces the overall height of the package, provides electromagnetic shielding without increasing size, and enhances heat dissipation efficiency by using conductive poles or ring-shaped elements and heat dissipation columns, respectively.
Implementation Method 1
a faraday cage is commonly placed to shield the EMI. The principle of the faraday cage is to apply a conductive shield (such as, a metal cover) to reflect the electrical interference or transfer the electrical interference to the ground
Implementation Method 2
the plurality of heat dissipation columns is connected to a back surface of the chip
Data Source
AI summary
An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.